ATAVRDISPLAYX Atmel, ATAVRDISPLAYX Datasheet - Page 141
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ATAVRDISPLAYX
Manufacturer Part Number
ATAVRDISPLAYX
Description
KIT EVAL XMEGA DISPLAY
Manufacturer
Atmel
Specifications of ATAVRDISPLAYX
Main Purpose
*
Embedded
*
Utilized Ic / Part
*
Primary Attributes
*
Secondary Attributes
*
Silicon Manufacturer
Atmel
Silicon Family Name
ATxmega
Kit Contents
Board
Features
Temperature Sensor, Mono Speaker Via Audio Amplifier
Svhc
No SVHC (15-Dec-2010)
Core Architecture
AVR
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATAVRDISPLAYX
Manufacturer:
Atmel
Quantity:
135
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13.14.10 INTCTRL - Interrupt Control Register
13.14.11 INT0MASK - Interrupt 0 Mask Register
13.14.12 INT1MASK - Interrupt 1 Mask Register
8077H–AVR–12/09
• Bit 7:4 - Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always
write these bits to zero when this register is written.
• Bit 3:2/1:0 - INTnLVL[1:0]: Interrupt n Level
These bits enable interrupt request for port interrupt n and select the interrupt level as described
in
• Bit 7:0 - INT0MSK[7:0]: Interrupt 0 Mask Register
These bits are used to mask which pins can be used as sources for port interrupt 0. If
INT0MASKn is written to one, pin n is used as source for port interrupt 0.The input sense config-
uration for each pin is decided by the PINnCTRL-registers.
• Bit 7:0 - INT1MASK[7:0]: Interrupt 1 Mask Register
These bits are used to mask which pins can be used as sources for port interrupt 1. If
INT1MASKn is written to one, pin n is used as source for port interrupt 1.The input sense config-
uration for each pin is decided by the PINnCTRL-registers.
Bit
+0x09
Read/Write
Initial Value
Bit
+0x0B
Read/Write
Initial Value
Bit
+0x0A
Read/Write
Initial Value
Section 12. ”Interrupts and Programmable Multi-level Interrupt Controller” on page
R/W
R/W
7
R
0
7
0
-
7
0
R/W
R/W
6
R
0
6
0
-
6
0
R/W
R/W
R
5
0
5
0
-
5
0
R/W
R/W
R
4
0
4
0
-
4
0
INT1MSK[7:0]
INT0MSK[7:0]
R/W
R/W
R/W
3
0
3
0
3
0
INT1LVL[1:0]
R/W
R/W
R/W
2
0
0
2
0
2
R/W
R/W
R/W
1
0
1
0
1
0
INT0LVL[1:0]
XMEGA A
R/W
R/W
R/W
0
0
0
0
0
0
123.
INT0MASK
INT1MASK
INTCTRL
141
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