ATAVRDISPLAYX Atmel, ATAVRDISPLAYX Datasheet - Page 173

• Manufacturer Part Number: ATAVRDISPLAYX
• Description: KIT EVAL XMEGA DISPLAY
• Manufacturer: Atmel

Specifications of ATAVRDISPLAYX

• Main Purpose: *
• Embedded: *
• Utilized Ic / Part: *
• Primary Attributes: *
• Secondary Attributes: *
• Silicon Manufacturer: Atmel
• Silicon Family Name: ATxmega
• Kit Contents: Board
• Features: Temperature Sensor, Mono Speaker Via Audio Amplifier
• Svhc: No SVHC (15-Dec-2010)
• Core Architecture: AVR
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

14.12.15 PERL - Period Register L
14.12.16 CCxH - Compare or Capture Register n H
14.12.17 CCxL - Compare or Capture Register n L
14.12.18 PERBUFH - Timer/Counter Period Buffer H
8077H–AVR–12/09
• Bit 7:0 - PER[7:0]
These bits holds the 8 LSB of the 16-bit Period register.
The CCxH and CCxL register pair represents the 16-bit value CCx.
These 16-bit registers have two functions dependent of mode of operation. For capture opera-
tion these registers constitute the second buffer level and access point for the CPU and DMA.
For compare operation these registers are all continuously compared to the counter value. Nor-
mally the outputs form the comparators are then used for generating waveforms.
CCx are updated with the buffer value from the corresponding CCxBUF register when an
UPDATE condition occurs.
• Bit 7:0 - CCx[15:8]
These bits holds the 8 MSB of the 16-bit Compare or Capture register.
• Bit 7:0 - CCx[7:0]
These bits holds the 8 LSB of the 16-bit Compare or Capture register.
The PERBUFH and PERBUFL register pair represents the 16-bit value PERBUF. This 16-bit
register serves as the buffer for the period register (PER). Accessing this register using CPU or
DMA will affect the PERBUFV flag.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
+0x26
Read/Write
Initial Value
R/W
R/W
R/W
7
0
7
1
7
0
R/W
R/W
R/W
6
0
6
1
6
0
R/W
R/W
R/W
5
0
5
1
5
0
R/W
R/W
R/W
4
0
4
1
4
0
CCx[7:0]
CCx[15:8]
PER[7:0]
R/W
R/W
R/W
3
0
3
1
3
0
R/W
R/W
R/W
2
0
2
1
2
0
R/W
R/W
R/W
1
0
1
1
1
0
XMEGA A
R/W
R/W
R/W
0
0
0
1
0
0
CCxH
CCxL
PERL
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