ATAVRDISPLAYX Atmel, ATAVRDISPLAYX Datasheet - Page 44

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ATAVRDISPLAYX

Manufacturer Part Number
ATAVRDISPLAYX
Description
KIT EVAL XMEGA DISPLAY
Manufacturer
Atmel
Datasheets

Specifications of ATAVRDISPLAYX

Main Purpose
*
Embedded
*
Utilized Ic / Part
*
Primary Attributes
*
Secondary Attributes
*
Silicon Manufacturer
Atmel
Silicon Family Name
ATxmega
Kit Contents
Board
Features
Temperature Sensor, Mono Speaker Via Audio Amplifier
Svhc
No SVHC (15-Dec-2010)
Core Architecture
AVR
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATAVRDISPLAYX
Manufacturer:
Atmel
Quantity:
135
4.20.6
4.20.7
8077H–AVR–12/09
MCUCR – MCU Control Register
EVSYSLOCK – Event System Lock Register
• Bit 7:0 - JTAGUID[7:0]: JTAG User ID
The JTAGUID can be used to identify two devices with identical Device ID in a JTAG scan chain.
The JTAGUID will during reset automatically be loaded from flash and placed in these registers.
• Bit 7:1 - Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always
write these bits to zero when this register is written.
• Bit 0 - JTAGD: JTAG Disable
Setting this bit will disable the JTAG interface. This bit is protected by the Configuration Change
Protection mechanism, for details refer to
page
• Bit 7:5 - Reserved
These bits are reserved and will always be read as zero. For compatibility with future devices,
always write these bits to zero when this register is written.
• Bit 4 - EVSYS1LOCK:
Setting this bit will lock all registers in the Event System related to event channels 4 to 7 for fur-
ther modifications. The following registers in the Event System are locked: CH4MUX,
CH4CTRL, CH5MUX, CH5CTRL, CH6MUX, CH6CTRL, CH7MUX, CH7CTRL. This bit is pro-
tected by the Configuration Change Protection mechanism, for details refer to
”Configuration Change Protection” on page
• Bit 3:1 - Reserved
These bits are reserved and will always be read as zero. For compatibility with future devices,
always write these bits to zero when this register is written.
• Bit 0 - EVSYS0LOCK:
Setting this bit will lock all registers in the Event System related to event channels 0 to 3 for fur-
ther modifications. The following registers in the Event System are locked: CH0MUX,
CH0CTRL, CH1MUX, CH1CTRL, CH2MUX, CH2CTRL, CH3MUX, CH3CTRL. This bit is pro-
Bit
+0x06
Read/Write
Initial Value
Bit
+0x08
Read/Write
Initial Value
12.
7
R
0
R
7
0
-
R
6
0
R
6
0
-
R
5
0
R
5
0
-
EVSYS1LOCK
R/W
4
0
Section 3.12 ”Configuration Change Protection” on
R
4
0
-
12.
R
3
0
R
3
0
-
R
2
0
2
R
0
-
R
1
0
R
1
0
-
EVSYS0LOCK
R/W
0
0
XMEGA A
JTAGD
R/W
0
0
Section 3.12
EVSYS_LOCK
MCUCR
44

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