ATAVRDISPLAYX Atmel, ATAVRDISPLAYX Datasheet - Page 88

• Manufacturer Part Number: ATAVRDISPLAYX
• Description: KIT EVAL XMEGA DISPLAY
• Manufacturer: Atmel

Specifications of ATAVRDISPLAYX

• Main Purpose: *
• Embedded: *
• Utilized Ic / Part: *
• Primary Attributes: *
• Secondary Attributes: *
• Silicon Manufacturer: Atmel
• Silicon Family Name: ATxmega
• Kit Contents: Board
• Features: Temperature Sensor, Mono Speaker Via Audio Amplifier
• Svhc: No SVHC (15-Dec-2010)
• Core Architecture: AVR
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

7.10.2
7.10.3
8077H–AVR–12/09
STATUS - Oscillator Status Register
XOSCCTRL - XOSC Control Register
• Bit 7:5 - Reserved
These bits are reserved and will always be read as zero. For compatibility with future devices,
always write these bits to zero when this register is written.
• Bit 4 - PLLRDY: PLL Ready
The PLLRDY flag is set when the PLL has locked on selected frequency and ready to be used
as he System Clock source.
• Bit 3 - XOSCRDY: External clock source Ready
The XOSCRDY flag is set when the external clock source is stable and ready to be used as the
System Clock source.
• Bit 2 - RC32KRDY: 32.768 kHz Internal RC Oscillator Ready
The RC32KRDY flag is set when the 32.768 kHz internal RC oscillator is stable and ready to be
used as the System Clock source.
• Bit 1 - RC32MRDY: 32 MHz Internal RC Oscillator Ready
The R32MRFY flag is set when the 32 MHz internal RC oscillator is stable and ready to be used
as the System Clock source.
• Bit 0 - RC2MRDY: 2 MHz Internal RC Oscillator Ready
The RC2MRDY flag is set when the 2 MHz internal RC oscillator is stable and is ready to be
used as the System Clock source.
• Bit 7:6 - FRQRANGE[1:0]: Crystal Oscillator Frequency Range Select
These bits select the frequency range for the connected crystal oscillator according to
on page
Bit
+0x02
Read/Write
Initial Value
Bit
+0x01
Read/Write
Initial Value
89.
R/W
FRQRANGE[1:0]
R
7
0
7
0
-
R/W
R
6
0
-
6
0
X32KLPM
R
5
0
-
R/W
5
0
PLLRDY
R
4
0
R
4
0
-
XOSCRDY
R
3
0
R/W
3
0
RC32KRDY
R/W
R
2
0
2
0
XOSCSEL[3:0]
R32MRDY
R/W
1
0
R
1
0
XMEGA A
RC2MRDY
R/W
0
0
R
0
0
Table 7-5
XOSCCTRL
STATUS
88