ATAVRDISPLAYX Atmel, ATAVRDISPLAYX Datasheet - Page 121

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ATAVRDISPLAYX

Manufacturer Part Number
ATAVRDISPLAYX
Description
KIT EVAL XMEGA DISPLAY
Manufacturer
Atmel
Datasheets

Specifications of ATAVRDISPLAYX

Main Purpose
*
Embedded
*
Utilized Ic / Part
*
Primary Attributes
*
Secondary Attributes
*
Silicon Manufacturer
Atmel
Silicon Family Name
ATxmega
Kit Contents
Board
Features
Temperature Sensor, Mono Speaker Via Audio Amplifier
Svhc
No SVHC (15-Dec-2010)
Core Architecture
AVR
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATAVRDISPLAYX
Manufacturer:
Atmel
Quantity:
135
11.7.3
8077H–AVR–12/09
STATUS – Watchdog Status Register
Table 11-2.
• Bit 1 - WEN: Watchdog Window Mode Enable
This bit enables the Watchdog Window Mode. In order to change this bit the WCEN bit in
”WINCTRL – Window Mode Control Register” on page 120
time. This bit is protected by the Configuration Change Protection mechanism, for detailed
description refer to
• Bit 0 - WCEN: Watchdog Window Mode Change Enable
This bit enables the possibility to change the configuration of the
Control Register” on page
to one at the same time for the changes to take effect. This bit is protected by the Configuration
Change Protection mechanism, but not protected by the WDT lock fuse.
• Bit 7:1 - Res:Reserved
These bits are reserved and will always be read as zero. For compatibility with future devices,
always write these bits to zero when this register is written.
• Bit 0 - SYNCBUSY
When writing to the CTRL or WINCTRL registers, the WDT needs to be synchronized to the
other clock domains. During synchronization the SYNCBUSY bit will be read as one. This bit is
automatically cleared after the synchronization is finished. Synchronization will only take place
when the ENABLE bit for the Watchdog Timer is set.
Bit
+0x02
Read/Write
Initial Value
WPER[3:0]
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Watchdog closed window periods (Continued)
R
7
0
-
Section 3.12 ”Configuration Change Protection” on page
R
6
0
-
120. When writing a new value to this register, this bit must be written
Group Configuration
R
5
0
-
500CLK
1KCLK
2KCLK
4KCLK
8KCLK
R
4
0
-
3
R
0
-
must be written to one at the same
2
R
0
-
Typical closed window periods
”WINCTRL – Window Mode
R
1
0
-
Reserved
Reserved
Reserved
Reserved
Reserved
0.5 s
1.0 s
2.0 s
4.0 s
8.0 s
SYNCBUSY
12.
XMEGA A
R
0
0
STATUS
121

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