ATAVRDISPLAYX Atmel, ATAVRDISPLAYX Datasheet - Page 307

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ATAVRDISPLAYX

Manufacturer Part Number
ATAVRDISPLAYX
Description
KIT EVAL XMEGA DISPLAY
Manufacturer
Atmel
Datasheets

Specifications of ATAVRDISPLAYX

Main Purpose
*
Embedded
*
Utilized Ic / Part
*
Primary Attributes
*
Secondary Attributes
*
Silicon Manufacturer
Atmel
Silicon Family Name
ATxmega
Kit Contents
Board
Features
Temperature Sensor, Mono Speaker Via Audio Amplifier
Svhc
No SVHC (15-Dec-2010)
Core Architecture
AVR
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATAVRDISPLAYX
Manufacturer:
Atmel
Quantity:
135
25.16.7
25.16.8
25.16.9
25.16.10 CHnRESH - ADC Channel n Result register High
8077H–AVR–12/09
TEMP - ADC Temporary register
CALL - ADC Calibration value registers
CALH - ADC Calibration value registers
• Bits 7:0 - TEMP[7:0]: ADC Temporary Register
This register is used when reading 16-bit registers in the ADC controller. The high byte of the 16-
bit register is stored here when the low byte read by the CPU. This register can also be read and
written from the user software.
For more details on 16-bit register access refer to
page
The CALL and CALH register pair hold the 12-bit value ADC calibration value CAL. The ADC is
calibrated during production programming, the calibration value must be read from the signature
row and written to the CAL register from software.
• Bits 7:0 - CAL[7:0]: ADC Calibration value
This is the 8 LSB of the 12-bit CAL value.
• Bits 7:0 - CAL[11:8]: ADC Calibration value
This is the 4 MSB of the 12-bit CAL value.
The CHnRESL and CHnRESH register pair represents the 16-bit value CHnRES. For details on
reading 16-bit register refer to
12-bit, left
12-bit, right
8-bit
Bit
+0x07
Read/Write
Initial Value
Bit
+0x0C
Read/Write
Initial Value
Bit
+0x0D
Read/Write
Initial Value
12.
Bit
Read/Write
Initial Value
R/W
7
0
R/W
R/W
7
0
7
0
-
R/W
6
0
R/W
R/W
6
0
6
0
-
R
7
0
-
-
Section 3.11 ”Accessing 16-bits Registers” on page
R/W
5
0
R/W
R/W
5
0
5
0
-
R
6
0
-
-
R/W
4
0
R/W
R/W
4
0
4
0
-
R
5
0
-
-
TEMP[7:0]
CAL[7:0]
Section 3.11 ”Accessing 16-bits Registers” on
R/W
R/W
R/W
3
0
3
0
3
0
R
4
0
-
-
CHRES[11:4]
R/W
R/W
R/W
2
0
2
0
2
0
R
3
0
-
CAL[11:8]
R/W
R/W
R/W
1
0
1
0
1
0
R
2
0
-
CHRES[11:8]
XMEGA A
R/W
R/W
R/W
0
0
0
0
0
0
R
1
0
-
12.
TEMP
CAL
CAL
R
0
0
-
307

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