ATAVRDISPLAYX Atmel, ATAVRDISPLAYX Datasheet - Page 217

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ATAVRDISPLAYX

Manufacturer Part Number
ATAVRDISPLAYX
Description
KIT EVAL XMEGA DISPLAY
Manufacturer
Atmel
Datasheets

Specifications of ATAVRDISPLAYX

Main Purpose
*
Embedded
*
Utilized Ic / Part
*
Primary Attributes
*
Secondary Attributes
*
Silicon Manufacturer
Atmel
Silicon Family Name
ATxmega
Kit Contents
Board
Features
Temperature Sensor, Mono Speaker Via Audio Amplifier
Svhc
No SVHC (15-Dec-2010)
Core Architecture
AVR
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATAVRDISPLAYX
Manufacturer:
Atmel
Quantity:
135
19.8
19.8.1
19.9
19.9.1
8077H–AVR–12/09
Register Description - TWI
Register Description - TWI Master
CTRL– TWI Common Control Register
CTRLA - TWI Master Control Register A
• Bit 7:2 - Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always
write these bits to zero when this register is written.
• Bit 1
SCL.
• Bit 0 - EDIEN: External Driver Interface Enable
Setting this bit enables the use of the external driver interface, clearing this bit enables normal
two wire mode. See
Table 19-1.
• Bit 7:6 - INTLVL[1:0]: Interrupt Level
The Interrupt Level (INTLVL) bit select the interrupt level for the TWI master interrupts.
• Bit 5 - RIEN: Read Interrupt Enable
Setting the Read Interrupt Enable (RIEN) bit enables the Read Interrupt when the Read Interrupt
Flag (RIF) in the STATUS register is set. In addition the INTLVL bits must be unequal zero for
TWI master interrupts to be generated.
Setting this bit to one enables an internal hold time on SDA with respect to the negative edge of
Bit
+0x00
Read/Write
Initial Value
Bit
+0x00
Read/Write
Initial Value
EDIEN
0
1
- SDAHOLD: SDA Hold Time Enable.
Mode
Normal TWI
External Driver
Interface
R/W
7
R
0
7
0
-
External Driver Interface Enable
INTLVL[1:0]
Table 19-1
R/W
6
R
0
6
0
-
Comment
Two pin interface,
Slew rate control and input filter.
Four pin interface,
Standard I/O, no slew-rate control, no input filter.
for details.
RIEN
R/W
R
5
0
5
0
-
WIEN
R/W
R
4
0
4
0
-
ENABLE
R/W
R
3
0
3
0
-
R
R
2
0
2
0
-
-
SDAHOLD
R/W
R
1
0
1
0
-
XMEGA A
EDIEN
R/W
R
0
0
0
0
-
CTRLA
CTRL
217

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