ATSAM3S-EK Atmel, ATSAM3S-EK Datasheet - Page 225
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ATSAM3S-EK
Manufacturer Part Number
ATSAM3S-EK
Description
KIT EVAL FOR ATSAM3S4C
Manufacturer
Atmel
Series
SAM3Sr
Type
MCUr
Specifications of ATSAM3S-EK
Contents
Board, Cables, Power Supply
Silicon Manufacturer
Atmel
Core Architecture
ARM
Core Sub-architecture
Cortex-M3
Kit Contents
Board
Features
TFT Colour LCD Display, SD/MMC Interface
Svhc
No SVHC (15-Dec-2010)
Rohs Compliant
Yes
For Use With/related Products
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATSAM3S-EK
Manufacturer:
Atmel
Quantity:
135
- Current page: 225 of 1118
- Download datasheet (24Mb)
12.3.3
12.3.4
12.3.4.1
Figure 12-3. General Reset State
6500C–ATARM–8-Feb-11
backup_nreset
periph_nreset
proc_nreset
(nrst_out)
RSTTYP
SLCK
NRST
MCK
Brownout Manager
Reset States
General Reset
As the ERSTL field is within RSTC_MR register, which is backed-up, it can be used to shape the
system power-up reset for devices requiring a longer startup time than the Slow Clock Oscillator.
The Brownout manager is embedded within the Supply Controller, please refer to the product
Supply Controller section for a detailed description.
The Reset State Manager handles the different reset sources and generates the internal reset
signals. It reports the reset status in the field RSTTYP of the Status Register (RSTC_SR). The
update of the field RSTTYP is performed when the processor reset is released.
A general reset occurs when a Power-on-reset is detected, a Brownout or a Voltage regulation
loss is detected by the Supply controller. The vddcore_nreset signal is asserted by the Supply
Controller when a general reset occurs.
All the reset signals are released and the field RSTTYP in RSTC_SR reports a General Reset.
As the RSTC_MR is reset, the NRST line rises 2 cycles after the vddcore_nreset, as ERSTL
defaults at value 0x0.
Figure 12-3
shows how the General Reset affects the reset signals.
XXX
EXTERNAL RESET LENGTH
= 2 cycles
Processor Startup
= 2 cycles
0x0 = General Reset
SAM3S Preliminary
Freq.
Any
XXX
225
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