ATSAM3S-EK Atmel, ATSAM3S-EK Datasheet - Page 720

• Manufacturer Part Number: ATSAM3S-EK
• Description: KIT EVAL FOR ATSAM3S4C
• Manufacturer: Atmel
• Series: SAM3Sr
• Type: MCUr

Specifications of ATSAM3S-EK

• Contents: Board, Cables, Power Supply
• Silicon Manufacturer: Atmel
• Core Architecture: ARM
• Core Sub-architecture: Cortex-M3
• Kit Contents: Board
• Features: TFT Colour LCD Display, SD/MMC Interface
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• For Use With/related Products: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

33.8.2
Name:
Addresses:
Access:
This register can only be written if the WPEN bit is cleared in
• USART_MODE
• USCLKS: Clock Selection
• CHRL: Character Length.
720
720
INVDATA
ONEBIT
Value
Value
Value
31
23
15
7
0xE
0xF
0x0
0x1
0x2
0x3
0x4
0x6
0x8
0
1
3
0
SAM3S Preliminary
SAM3S Preliminary
USART Mode Register
CHMODE
CHRL
VAR_SYNC
MODSYNC
HW_HANDSHAKING
30
22
14
US_MR
0x40024004 (0), 0x40028004 (1)
Read-write
6
Name
5_BIT
SPI_MASTER
IS07816_T_0
IS07816_T_1
SPI_SLAVE
NORMAL
MODEM
RS485
Name
Name
MCK
IRDA
SCK
DIV
DSNACK
MAN
Description
Character length is 5 bits
29
21
13
5
NBSTOP
USCLKS
Description
Normal mode
RS485
Hardware Handshaking
Modem
IS07816 Protocol: T = 0
IS07816 Protocol: T = 1
IrDA
SPI Master
SPI Slave
Description
Master Clock MCK is selected
Internal Clock Divided MCK/DIV (DIV=8) is selected
Serial Clock SLK is selected
FILTER
INACK
28
20
12
4
“USART Write Protect Mode Register” on page
OVER
27
19
11
–
3
CLKO
PAR
26
18
10
2
USART_MODE
MAX_ITERATION
MODE9
25
17
9
1
6500C–ATARM–8-Feb-11
6500C–ATARM–8-Feb-11
MSBF/CPOL
SYNC/CPHA
741.
24
16
8
0