ATSAM3S-EK Atmel, ATSAM3S-EK Datasheet - Page 770

• Manufacturer Part Number: ATSAM3S-EK
• Description: KIT EVAL FOR ATSAM3S4C
• Manufacturer: Atmel
• Series: SAM3Sr
• Type: MCUr

Specifications of ATSAM3S-EK

• Contents: Board, Cables, Power Supply
• Silicon Manufacturer: Atmel
• Core Architecture: ARM
• Core Sub-architecture: Cortex-M3
• Kit Contents: Board
• Features: TFT Colour LCD Display, SD/MMC Interface
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• For Use With/related Products: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

34.7.2
Name:
Addresses:
Access:
This register can only be written if the WPEN bit is cleared in
• TC0XC0S: External Clock Signal 0 Selection
• TC1XC1S: External Clock Signal 1 Selection
• TC2XC2S: External Clock Signal 2 Selection
• QDEN: Quadrature Decoder ENabled
0 = disabled.
1 = enables the quadrature decoder logic (filter, edge detection and quadrature decoding).
quadrature decoding (direction change) can be disabled using QDTRANS bit.
770
Value
Value
Value
INVIDX
0
1
2
3
0
1
2
3
0
1
2
3
31
23
15
–
7
–
SAM3S Preliminary
TC Block Mode Register
Name
TCLK0
–
TIOA1
TIOA2
Name
TCLK1
–
TIOA0
TIOA2
Name
TCLK2
–
TIOA1
TIOA2
INVB
30
22
14
TC_BMR
0x400100C4 (0), 0x400140C4 (1)
Read-write
–
6
–
MAXFILT
Description
Signal connected to XC0: TCLK0
Reserved
Signal connected to XC0: TIOA1
Signal connected to XC0: TIOA2
Description
Signal connected to XC1: TCLK1
Reserved
Signal connected to XC1: TIOA0
Signal connected to XC1: TIOA2
Description
Signal connected to XC2: TCLK2
Reserved
Signal connected to XC2: TIOA1
Signal connected to XC2: TIOA2
INVA
29
21
13
–
5
TC2XC2S
EDGPHA
28
20
12
–
4
“TC Write Protect Mode Register” on page
QDTRANS
FILTER
27
19
11
–
3
TC1XC1S
SPEEDEN
26
18
10
–
–
2
IDXPHB
POSEN
25
17
9
1
TC0XC0S
MAXFILT
6500C–ATARM–8-Feb-11
778.
SWAP
QDEN
24
16
8
0