ATSAM3S-EK Atmel, ATSAM3S-EK Datasheet - Page 392

• Manufacturer Part Number: ATSAM3S-EK
• Description: KIT EVAL FOR ATSAM3S4C
• Manufacturer: Atmel
• Series: SAM3Sr
• Type: MCUr

Specifications of ATSAM3S-EK

• Contents: Board, Cables, Power Supply
• Silicon Manufacturer: Atmel
• Core Architecture: ARM
• Core Sub-architecture: Cortex-M3
• Kit Contents: Board
• Features: TFT Colour LCD Display, SD/MMC Interface
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• For Use With/related Products: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

23.13.2
Figure 23-29. Clock Rate Transition Occurs while the SMC is Performing a Write Operation
Figure 23-30. Recommended Procedure to Switch from Slow Clock Mode to Normal Mode or from Normal Mode to Slow
392
internal signal from PMC
Slow Clock Mode
internal signal from PMC
SAM3S Preliminary
Switching from (to) Slow Clock Mode to (from) Normal Mode
Slow Clock Mode
Clock Mode
A[23:0]
NWE
MCK
NCS
This write cycle finishes with the slow clock mode set
A [23:0]
NWE
MCK
NCS
of parameters after the clock rate transition
When switching from slow clock mode to the normal mode, the current slow clock mode transfer
is completed at high clock rate, with the set of slow clock mode parameters.See
page
Figure 23-30
other.
SLOW CLOCK MODE WRITE
1
392. The external device may not be fast enough to support such timings.
SLOW CLOCK MODE WRITE
1
illustrates the recommended procedure to properly switch from one mode to the
1
NWE_CYCLE = 3
1
1
1
SLOW CLOCK MODE WRITE
1
IDLE STATE
Reload Configuration Wait State
transition is detected:
1
Slow clock mode
1
Reload Configuration
Wait State
2
NORMAL MODE WRITE
2
NWE_CYCLE = 7
NORMAL MODE WRITE
3
3
6500C–ATARM–8-Feb-11
2
Figure 23-29 on
2