ATSAM3S-EK Atmel, ATSAM3S-EK Datasheet - Page 818

• Manufacturer Part Number: ATSAM3S-EK
• Description: KIT EVAL FOR ATSAM3S4C
• Manufacturer: Atmel
• Series: SAM3Sr
• Type: MCUr

Specifications of ATSAM3S-EK

• Contents: Board, Cables, Power Supply
• Silicon Manufacturer: Atmel
• Core Architecture: ARM
• Core Sub-architecture: Cortex-M3
• Kit Contents: Board
• Features: TFT Colour LCD Display, SD/MMC Interface
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• For Use With/related Products: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

35.14.3
Name:
Address:
Access:
This register can only be written if the WPEN bit is cleared in
• DTOCYC: Data Timeout Cycle Number
These fields determine the maximum number of Master Clock cycles that the HSMCI waits between two data block trans-
fers. It equals (DTOCYC x Multiplier).
• DTOMUL: Data Timeout Multiplier
Multiplier is defined by DTOMUL as shown in the following table:
If the data time-out set by DTOCYC and DTOMUL has been exceeded, the Data Time-out Error flag (DTOE) in the HSMCI
Status Register (HSMCI_SR) raises.
818
31
23
15
–
–
–
7
–
SAM3S Preliminary
Value
HSMCI Data Timeout Register
0
1
2
3
4
5
6
7
30
22
14
HSMCI_DTOR
0x40000008
Read-write
–
–
–
6
DTOMUL
1048576
65536
Name
1024
4096
29
21
13
128
256
–
–
–
5
16
1
28
20
12
–
–
–
4
Description
DTOCYC
DTOCYC x 16
DTOCYC x 128
DTOCYC x 256
DTOCYC x 1024
DTOCYC x 4096
DTOCYC x 65536
DTOCYC x 1048576
“HSMCI Write Protect Mode Register” on page
27
19
11
–
–
–
3
26
18
10
–
–
–
2
DTOCYC
25
17
–
–
9
–
1
6500C–ATARM–8-Feb-11
840.
24
16
–
–
8
–
0