ATSAM3S-EK Atmel, ATSAM3S-EK Datasheet - Page 889
ATSAM3S-EK
Manufacturer Part Number
ATSAM3S-EK
Description
KIT EVAL FOR ATSAM3S4C
Manufacturer
Atmel
Series
SAM3Sr
Type
MCUr
Specifications of ATSAM3S-EK
Contents
Board, Cables, Power Supply
Silicon Manufacturer
Atmel
Core Architecture
ARM
Core Sub-architecture
Cortex-M3
Kit Contents
Board
Features
TFT Colour LCD Display, SD/MMC Interface
Svhc
No SVHC (15-Dec-2010)
Rohs Compliant
Yes
For Use With/related Products
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATSAM3S-EK
Manufacturer:
Atmel
Quantity:
135
- Current page: 889 of 1118
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36.7.10
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Address:
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• UPDULOCK: Synchronous Channels Update Unlock
0 = No effect
1 = If the UPDM field is set to “0” in
triggers the update of the period value, the duty-cycle and the dead-time values of synchronous channels at the beginning
of the next PWM period. If the field UPDM is set to “1” or “2”, writing the UPDULOCK bit to “1” triggers only the update of
the period value and of the dead-time values of synchronous channels.
This bit is automatically reset when the update is done.
6500C–ATARM–8-Feb-11
31
23
15
–
–
–
7
–
PWM Sync Channels Update Control Register
30
22
14
PWM_SCUC
0x40020028
–
–
–
6
–
Read-write
“PWM Sync Channels Mode Register” on page
29
21
13
–
–
–
5
–
28
20
12
–
–
–
4
–
27
19
11
–
–
–
3
–
26
18
10
–
–
–
2
–
888, writing the UPDULOCK bit to “1”
SAM3S Preliminary
25
17
–
–
9
–
1
–
UPDULOCK
24
16
–
–
8
–
0
889
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