ATSAM3S-EK Atmel, ATSAM3S-EK Datasheet - Page 442

• Manufacturer Part Number: ATSAM3S-EK
• Description: KIT EVAL FOR ATSAM3S4C
• Manufacturer: Atmel
• Series: SAM3Sr
• Type: MCUr

Specifications of ATSAM3S-EK

• Contents: Board, Cables, Power Supply
• Silicon Manufacturer: Atmel
• Core Architecture: ARM
• Core Sub-architecture: Cortex-M3
• Kit Contents: Board
• Features: TFT Colour LCD Display, SD/MMC Interface
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• For Use With/related Products: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

26.15 Write Protection Registers
To prevent any single software error that may corrupt PMC behavior, certain address spaces
can be write-protected by setting the WPEN bit in the
“PMC Write Protect Mode Register”
(PMC_WPMR).
If a write access to the protected registers is detected, then the WPVS flag in the PMC Write
Protect Status Register (PMC_WPSR) is set and the field WPVSRC indicates in which register
the write access has been attempted.
The WPVS flag is reset by writing the PMC Write Protect Mode Register (PMC_WPMR) with the
appropriate access key, WPKEY.
The protected registers are:
“PMC System Clock Enable Register” on page 444
“PMC System Clock Disable Register” on page 445
“PMC Peripheral Clock Enable Register 0” on page 447
“PMC Peripheral Clock Disable Register 0” on page 448
“PMC Clock Generator Main Oscillator Register” on page 450
“PMC Clock Generator PLLA Register” on page 453
“PMC Clock Generator PLLB Register” on page 454
“PMC Master Clock Register” on page 455
“PMC USB Clock Register” on page 456
“PMC Programmable Clock Register” on page 457
“PMC Fast Startup Mode Register” on page 463
“PMC Fast Startup Polarity Register” on page 464
“PMC Peripheral Clock Enable Register 1” on page 468
“PMC Peripheral Clock Disable Register 1” on page 469
“PMC Oscillator Calibration Register” on page 471
SAM3S Preliminary
442
6500C–ATARM–8-Feb-11