ATSAM3S-EK Atmel, ATSAM3S-EK Datasheet - Page 421
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ATSAM3S-EK
Manufacturer Part Number
ATSAM3S-EK
Description
KIT EVAL FOR ATSAM3S4C
Manufacturer
Atmel
Series
SAM3Sr
Type
MCUr
Specifications of ATSAM3S-EK
Contents
Board, Cables, Power Supply
Silicon Manufacturer
Atmel
Core Architecture
ARM
Core Sub-architecture
Cortex-M3
Kit Contents
Board
Features
TFT Colour LCD Display, SD/MMC Interface
Svhc
No SVHC (15-Dec-2010)
Rohs Compliant
Yes
For Use With/related Products
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATSAM3S-EK
Manufacturer:
Atmel
Quantity:
135
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25. Clock Generator
25.1
25.2
6500C–ATARM–8-Feb-11
Description
Embedded Characteristics
The Clock Generator User Interface is embedded within the Power Management Controller and
is described in
the Clock Generator registers are named CKGR_.
The Clock Generator is made up of:
It provides the following clocks:
PLLBCK is the output of the Divider and 60 to 130 MHz programmable PLL (PLLB)
• A Low Power 32,768 Hz Slow Clock Oscillator with bypass mode
• A Low Power RC Oscillator
• A 3 to 20 MHz Crystal or Ceramic Resonator-based Oscillator which can be bypassed
• A factory programmed Fast RC Oscillator, 3 output frequencies can be selected: 4, 8 or
• Two 60 to 130 MHz programmable PLL (input from 3.5 to 20 MHz), capable of providing the
• SLCK, the Slow Clock, which is the only permanent clock within the system
• MAINCK is the output of the Main Clock Oscillator selection: either the Crystal or Ceramic
• PLLACK is the output of the Divider and 60 to 130 MHz programmable PLL (PLLA)
12 MHz. By default 4 MHz is selected.
clock MCK to the processor and to the peripherals.
Resonator-based Oscillator or 4/8/12 MHz Fast RC Oscillator
Section 26.16 ”Power Management Controller (PMC) User
SAM3S Preliminary
Interface”. However,
421
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