ATSAM3S-EK Atmel, ATSAM3S-EK Datasheet - Page 534

• Manufacturer Part Number: ATSAM3S-EK
• Description: KIT EVAL FOR ATSAM3S4C
• Manufacturer: Atmel
• Series: SAM3Sr
• Type: MCUr

Specifications of ATSAM3S-EK

• Contents: Board, Cables, Power Supply
• Silicon Manufacturer: Atmel
• Core Architecture: ARM
• Core Sub-architecture: Cortex-M3
• Kit Contents: Board
• Features: TFT Colour LCD Display, SD/MMC Interface
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• For Use With/related Products: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

28.7.53
Name:
Addresses:
Access:
• DRDY: Parallel Capture Mode Data Ready
0: No new data is ready to be read since the last read of PIO_PCRHR.
1: A new data is ready to be read since the last read of PIO_PCRHR.
The DRDY flag is automatically reset when PIO_PCRHR is read or when the parallel capture mode is disabled.
• OVRE: Parallel Capture Mode Overrun Error.
0 = No overrun error occurred since the last read of this register.
1 = At least one overrun error occurred since the last read of this register.
The OVRE flag is automatically reset when this register is read or when the parallel capture mode is disabled.
• ENDRX: End of Reception Transfer.
0 = The End of Transfer signal from the Reception PDC channel is inactive.
1 = The End of Transfer signal from the Reception PDC channel is active.
• RXBUFF: Reception Buffer Full
0: The signal Buffer Full from the Reception PDC channel is inactive.
1: The signal Buffer Full from the Reception PDC channel is active.
534
534
31
23
15
–
–
–
7
–
SAM3S Preliminary
SAM3S Preliminary
PIO Parallel Capture Interrupt Status Register
30
22
14
PIO_PCISR
0x400E0F60 (PIOA), 0x400E1160 (PIOB), 0x400E1360 (PIOC)
Read-only
–
–
–
6
–
29
21
13
–
–
–
5
–
28
20
12
–
–
–
4
–
RXBUFF
27
19
11
–
–
–
3
ENDRX
26
18
10
–
–
–
2
OVRE
25
17
–
–
–
9
1
6500C–ATARM–8-Feb-11
6500C–ATARM–8-Feb-11
DRDY
24
16
–
–
8
–
0