ATSAM3S-EK Atmel, ATSAM3S-EK Datasheet - Page 624

• Manufacturer Part Number: ATSAM3S-EK
• Description: KIT EVAL FOR ATSAM3S4C
• Manufacturer: Atmel
• Series: SAM3Sr
• Type: MCUr

Specifications of ATSAM3S-EK

• Contents: Board, Cables, Power Supply
• Silicon Manufacturer: Atmel
• Core Architecture: ARM
• Core Sub-architecture: Cortex-M3
• Kit Contents: Board
• Features: TFT Colour LCD Display, SD/MMC Interface
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• For Use With/related Products: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

31.8.7.1
31.8.7.2
31.8.8
31.8.9
624
SAM3S Preliminary
SMBUS Quick Command (Master Mode Only)
Read-write Flowcharts
Data Transmit with the PDC
Data Receive with the PDC
The TWI interface can perform a Quick Command:
Figure 31-14. SMBUS Quick Command
The following flowcharts shown in
31-18 on page
read and write operations. A polling or interrupt method can be used to check the status bits.
The interrupt method requires that the interrupt enable register (TWI_IER) be configured first.
1. Initialize the transmit PDC (memory pointers, size, etc.).
2. Configure the master mode (DADR, CKDIV, etc.).
3. Start the transfer by setting the PDC TXTEN bit.
4. Wait for the PDC end TX flag.
5. Disable the PDC by setting the PDC TXDIS bit.
1. Initialize the receive PDC (memory pointers, size - 1, etc.).
2. Configure the master mode (DADR, CKDIV, etc.).
3. Start the transfer by setting the PDC RXTEN bit.
4. Wait for the PDC end RX flag.
5. Disable the PDC by setting the PDC RXDIS bit.
1. Configure the master mode (DADR, CKDIV, etc.).
2. Write the MREAD bit in the TWI_MMR register at the value of the one-bit command to
3. Start the transfer by setting the QUICK bit in the TWI_CR.
be sent.
628,
Figure 31-19 on page 629
TXCOMP
Write QUICK command in TWI_CR
TXRDY
TWD
Figure 31-16 on page
S
DADR
and
Figure 31-20 on page 630
R/W
626,
A
Figure 31-17 on page
P
6500C–ATARM–8-Feb-11
give examples for
627,
Figure