ATSAM3S-EK Atmel, ATSAM3S-EK Datasheet - Page 276
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ATSAM3S-EK
Manufacturer Part Number
ATSAM3S-EK
Description
KIT EVAL FOR ATSAM3S4C
Manufacturer
Atmel
Series
SAM3Sr
Type
MCUr
Specifications of ATSAM3S-EK
Contents
Board, Cables, Power Supply
Silicon Manufacturer
Atmel
Core Architecture
ARM
Core Sub-architecture
Cortex-M3
Kit Contents
Board
Features
TFT Colour LCD Display, SD/MMC Interface
Svhc
No SVHC (15-Dec-2010)
Rohs Compliant
Yes
For Use With/related Products
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATSAM3S-EK
Manufacturer:
Atmel
Quantity:
135
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16.4.6
16.4.6.1
16.4.6.2
276
SAM3S Preliminary
Core Reset
Supply Monitor Reset
Brownout Detector Reset
The Supply Controller manages the vddcore_nreset signal to the Reset Controller, as described
previously in
asserted before shutting down the core power supply and released as soon as the core power
supply is correctly regulated.
There are two additional sources which can be programmed to activate vddcore_nreset:
The supply monitor is capable of generating a reset of the system. This can be enabled by set-
ting the SMRSTEN bit in the Supply Controller Supply Monitor Mode Register (SUPC_SMMR).
If SMRSTEN is set and if a supply monitor detection occurs, the vddcore_nreset signal is imme-
diately activated for a minimum of 1 slow clock cycle.
The brownout detector provides the bodcore_in signal to the SUPC which indicates that the volt-
age regulation is operating as programmed. If this signal is lost for longer than 1 slow clock
period while the voltage regulator is enabled, the Supply Controller can assert vddcore_nreset.
This feature is enabled by writing the bit, BODRSTEN (Brownout Detector Reset Enable) to 1 in
the Supply Controller Mode Register (SUPC_MR).
If BODRSTEN is set and the voltage regulation is lost (output voltage of the regulator too low),
the vddcore_nreset signal is asserted for a minimum of 1 slow clock cycle and then released if
bodcore_in has been reactivated. The BODRSTS bit is set in the Supply Controller Status Reg-
ister (SUPC_SR) so that the user can know the source of the last reset.
Until bodcore_in is deactivated, the vddcore_nreset signal remains active.
• a supply monitor detection
• a brownout detection
Section 16.4.5 ”Power Supply
Reset”. The vddcore_nreset signal is normally
6500C–ATARM–8-Feb-11
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