LPC2458FET180,551 NXP Semiconductors, LPC2458FET180,551 Datasheet - Page 197

• Manufacturer Part Number: LPC2458FET180,551
• Description: IC ARM7 MCU FLASH 512K 180TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2458FET180,551

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 136
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 98K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 180-TFBGA
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN, Ethernet, I2C, I2S, IrDA, SPI, SSP, UART, USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, SAB-TFBGA180
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• On-chip Dac: 10 bit, 1 Channel
• Package: 180TFBGA
• Device Core: ARM7TDMI-S
• Family Name: LPC2000
• Maximum Speed: 72 MHz
• For Use With: 622-1023 - BOARD SCKT ADAPTER FOR TFBGA180622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4258; 935282454551; LPC2458FET180-S

NXP Semiconductors
Table 158. Summary of GPIO registers (legacy APB accessible registers)
[1]
UM10237_4
User manual
Generic
Name
IOPIN
IOSET
IODIR
IOCLR
Reset value reflects the data stored in used bits only. It does not include reserved bits content.
Description
GPIO Port Pin value register. The current state of the GPIO
configured port pins can always be read from this register,
regardless of pin direction. By writing to this register port’s pins will
be set to the desired level instantaneously.
GPIO Port Output Set register. This register controls the state of
output pins in conjunction with the IOCLR register. Writing ones
produces highs at the corresponding port pins. Writing zeroes has
no effect.
GPIO Port Direction control register. This register individually
controls the direction of each port pin.
GPIO Port Output Clear register. This register controls the state of
output pins. Writing ones produces lows at the corresponding port
pins and clears the corresponding bits in the IOSET register.
Writing zeroes has no effect.
Rev. 04 — 26 August 2009
Chapter 10: LPC24XX General Purpose Input/Output (GPIO)
Access Reset
R/W
R/W
R/W
WO
value
NA
0x0
0x0
0x0
[1]
PORTn Register
Address & Name
IO0PIN - 0xE002 8000
IO1PIN - 0xE002 8010
IO0SET - 0xE002 8004
IO1SET - 0xE002 8014
IO0DIR - 0xE002 8008
IO1DIR - 0xE002 8018
IO0CLR - 0xE002 800C
IO1CLR - 0xE002 801C
UM10237
© NXP B.V. 2009. All rights reserved.
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