LPC2458FET180,551 NXP Semiconductors, LPC2458FET180,551 Datasheet - Page 629

IC ARM7 MCU FLASH 512K 180TFBGA

LPC2458FET180,551

Manufacturer Part Number
LPC2458FET180,551
Description
IC ARM7 MCU FLASH 512K 180TFBGA
Manufacturer
NXP Semiconductors
Series
LPC2400r
Datasheets

Specifications of LPC2458FET180,551

Core Processor
ARM7
Core Size
16/32-Bit
Speed
72MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
136
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
98K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
180-TFBGA
Processor Series
LPC24
Core
ARM7TDMI-S
Data Bus Width
32 bit
Data Ram Size
98 KB
Interface Type
CAN, Ethernet, I2C, I2S, IrDA, SPI, SSP, UART, USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
136
Number Of Timers
4
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, SAB-TFBGA180
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
On-chip Dac
10 bit, 1 Channel
Package
180TFBGA
Device Core
ARM7TDMI-S
Family Name
LPC2000
Maximum Speed
72 MHz
For Use With
622-1023 - BOARD SCKT ADAPTER FOR TFBGA180622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
568-4258
935282454551
LPC2458FET180-S

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LPC2458FET180,551
Manufacturer:
MICROCHIP
Quantity:
1 103
Part Number:
LPC2458FET180,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
UM10237_4
User manual
6.11 External Match Register (T[0/1/2/3]EMR - 0xE000 403C, 0xE000 803C,
0xE007 003C, 0xE007 403C)
The External Match Register provides both control and status of the external match pins.
In the descriptions below, “n” represents the Timer number, 0,1, 2, or 3, and “m” represent
a Match number, 0 through 3.
Table 552: External Match Register (T[0/1/2/3]EMR - addresses 0xE000 403C, 0xE000 803C,
Table 553. External Match Control
Bit
0
1
2
3
5:4
7:6
9:8
11:10 EMC3
15:12 -
EMR[11:10], EMR[9:8],
EMR[7:6], or EMR[5:4]
Symbol Description
EM0
EM1
EM2
EM3
EMC0
EMC1
EMC2
0xE007 003C, 0xE007 403C) bit description
00
01
10
11
External Match 0. When a match occurs between the TC and MR0, this
bit can either toggle, go low, go high, or do nothing, depending on bits 5:4
of this register. This bit can be driven onto a MATn.0 pin, in a
positive-logic manner (0 = low, 1 = high).
External Match 1. When a match occurs between the TC and MR1, this
bit can either toggle, go low, go high, or do nothing, depending on bits 7:6
of this register. This bit can be driven onto a MATn.1 pin, in a
positive-logic manner (0 = low, 1 = high).
External Match 2. When a match occurs between the TC and MR2, this
bit can either toggle, go low, go high, or do nothing, depending on bits 9:8
of this register. This bit can be driven onto a MATn.0 pin, in a
positive-logic manner (0 = low, 1 = high).
External Match 3. When a match occurs between the TC and MR3, this
bit can either toggle, go low, go high, or do nothing, depending on bits
11:10 of this register. This bit can be driven onto a MATn.0 pin, in a
positive-logic manner (0 = low, 1 = high).
External Match Control 0. Determines the functionality of External Match
0.
External Match Control 1. Determines the functionality of External Match
1.
External Match Control 2. Determines the functionality of External Match
2.
External Match Control 3. Determines the functionality of External Match
3.
Reserved, user software should not write ones to reserved bits. The
value read from a reserved bit is not defined.
Table 24–553
Table 24–553
Table 24–553
Table 24–553
Rev. 04 — 26 August 2009
Function
Do Nothing.
Clear the corresponding External Match bit/output to 0 (MATn.m pin is
LOW if pinned out).
Set the corresponding External Match bit/output to 1 (MATn.m pin is
HIGH if pinned out).
Toggle the corresponding External Match bit/output.
shows the encoding of these bits.
shows the encoding of these bits.
shows the encoding of these bits.
shows the encoding of these bits.
Chapter 24: LPC24XX Timer0/1/2/3
UM10237
© NXP B.V. 2009. All rights reserved.
629 of 792
Reset
Value
0
0
0
0
00
00
00
00
NA

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