LPC2458FET180,551 NXP Semiconductors, LPC2458FET180,551 Datasheet - Page 329

• Manufacturer Part Number: LPC2458FET180,551
• Description: IC ARM7 MCU FLASH 512K 180TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2458FET180,551

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 136
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 98K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 180-TFBGA
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN, Ethernet, I2C, I2S, IrDA, SPI, SSP, UART, USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, SAB-TFBGA180
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• On-chip Dac: 10 bit, 1 Channel
• Package: 180TFBGA
• Device Core: ARM7TDMI-S
• Family Name: LPC2000
• Maximum Speed: 72 MHz
• For Use With: 622-1023 - BOARD SCKT ADAPTER FOR TFBGA180622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4258; 935282454551; LPC2458FET180-S

1. Basic configuration
2. Introduction
UM10237_4
User manual
The USB controller is configured using the following registers:
The Universal Serial Bus (USB) is a four-wire bus that supports communication between a
host and one or more (up to 127) peripherals. The host controller allocates the USB
bandwidth to attached devices through a token-based protocol. The bus supports hot
plugging and dynamic configuration of the devices. All transactions are initiated by the
host controller.
The host schedules transactions in 1 ms frames. Each frame contains a Start-Of-Frame
(SOF) marker and transactions that transfer data to or from device endpoints. Each device
can have a maximum of 16 logical or 32 physical endpoints. There are four types of
transfers defined for the endpoints. Control transfers are used to configure the device.
Interrupt transfers are used for periodic data transfer. Bulk transfers are used when the
rate of transfer is not critical. Isochronous transfers have guaranteed delivery time but no
error correction.
For more information on the Universal Serial Bus, see the USB Implementers Forum
website.
The USB device controller on the LPC2400 enables full-speed (12 Mb/s) data exchange
with a USB host controller.
Table 289. USB related acronyms, abbreviations, and definitions used in this chapter
Acronym/abbreviation Description
AHB
ATLE
ATX
DD
DDP
DMA
1. Power: In the PCONP register
2. Clock: see
3. Pins: Select USB pins and their modes in PINSEL0 to PINSEL5 and PINMODE0 to
4. Wakeup: Use the INTWAKE register
5. Interrupts: See
6. Initialization: see
UM10237
Chapter 13: LPC24XX USB device controller
Rev. 04 — 26 August 2009
Remark: On reset, the USB block is disabled (PCUSB = 0).
PINMODE5
port to wake up the microcontroller from Power-down mode.
VICIntEnable register
Table
(Section
Section
4–54.
Section
Rev. 04 — 26 August 2009
Advanced High-performance bus
Auto Transfer Length Extraction
Analog Transceiver
DMA Descriptor
DMA Description Pointer
Direct Memory Access
9–5).
(Table
13–10. Interrupts are enabled in the VIC using the
13–12.
7–106).
(Table
(Table
4–63), set bit PCUSB.
4–62) to enable activity on the USB bus
© NXP B.V. 2009. All rights reserved.
User manual
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