LPC2458FET180,551 NXP Semiconductors, LPC2458FET180,551 Datasheet - Page 88

• Manufacturer Part Number: LPC2458FET180,551
• Description: IC ARM7 MCU FLASH 512K 180TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2458FET180,551

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 136
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 98K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 180-TFBGA
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN, Ethernet, I2C, I2S, IrDA, SPI, SSP, UART, USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, SAB-TFBGA180
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• On-chip Dac: 10 bit, 1 Channel
• Package: 180TFBGA
• Device Core: ARM7TDMI-S
• Family Name: LPC2000
• Maximum Speed: 72 MHz
• For Use With: 622-1023 - BOARD SCKT ADAPTER FOR TFBGA180622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4258; 935282454551; LPC2458FET180-S

NXP Semiconductors
UM10237_4
User manual
10.18 Static Memory Extended Wait register (EMCStaticExtendedWait -
10.19 Dynamic Memory Configuration registers (EMCDynamicConfig0-3 -
Table 84.
0xFFE0 8080)
ExtendedWait (EW) bit in the EMCStaticConfig register is set. It is recommended that this
register is modified during system initialization, or when there are no current or
outstanding transactions. However, if necessary, these control bits can be altered during
normal operation. This register is accessed with one wait state.
Table 5–85
Table 85.
For example, for a static memory read/write transfer time of 16 µs, and a CCLK frequency
of 50 MHz, the following value must be programmed into this register: (16 x 10-6 x 50 x
106) / 16 - 1 = 49
0xFFE0 8100, 120, 140, 160)
The EMCDynamicConfig0-3 registers enable you to program the configuration information
for the relevant dynamic memory chip select. These registers are normally only modified
during system initialization. These registers are accessed with one wait state.
Table 5–86
Bit
3:0
31:4
Bit
9:0
31:10 -
Symbol
Load mode
register to active
command time
(tMRD)
-
Symbol
Extended wait time
out
(EXTENDEDWAIT)
Dynamic Memory Load Mode register to Active Command Time
(EMCDynamictMRD - address 0xFFE0 8058) bit description
Static Memory Extended Wait register (EMCStaticExtendedWait - address
0xFFE0 8080) bit description
shows the bit assignments for the EMCStaticExtendedWait registers.
shows the bit assignments for the EMCDynamicConfig0-3 registers.
Rev. 04 — 26 August 2009
0x0 -
0xE
0xF
Value Description
-
Value Description
0x0
0x1
-
Chapter 5: LPC24XX External Memory Controller (EMC)
n + 1 clock cycles. The delay is in CCLK cycles.
16 clock cycles (POR reset value).
Reserved, user software should not write ones to
reserved bits. The value read from a reserved bit is not
defined.
16 clock cycles (POR reset value). The delay is in
CCLK cycles.
(n+1) x16 clock cycles.
Reserved, user software should not write ones to
reserved bits. The value read from a reserved bit is
not defined.
UM10237
© NXP B.V. 2009. All rights reserved.
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Reset
Value
0xF
NA
Reset
Value
NA