LPC2458FET180,551 NXP Semiconductors, LPC2458FET180,551 Datasheet - Page 286

• Manufacturer Part Number: LPC2458FET180,551
• Description: IC ARM7 MCU FLASH 512K 180TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2458FET180,551

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 136
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 98K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 180-TFBGA
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN, Ethernet, I2C, I2S, IrDA, SPI, SSP, UART, USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, SAB-TFBGA180
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• On-chip Dac: 10 bit, 1 Channel
• Package: 180TFBGA
• Device Core: ARM7TDMI-S
• Family Name: LPC2000
• Maximum Speed: 72 MHz
• For Use With: 622-1023 - BOARD SCKT ADAPTER FOR TFBGA180622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4258; 935282454551; LPC2458FET180-S

NXP Semiconductors
6. LCD controller functional description
UM10237_4
User manual
Table 245. Pins used for TFT displays
The LCD controller performs translation of pixel-coded data into the required formats and
timings to drive a variety of single or dual panel monochrome and color LCDs.
Packets of pixel coded data are fed using the AHB interface, to two independent,
programmable, 32-bit wide, DMA FIFOs that act as input data flow buffers.
The buffered pixel coded data is then unpacked using a pixel serializer.
Depending on the LCD type and mode, the unpacked data can represent:
In the case of STN displays, either a value obtained from the addressed palette location,
or the true value is passed to the gray scaling generators. The hardware-coded gray scale
algorithm logic sequences the activity of the addressed pixels over a programmed number
of frames to provide the effective display appearance.
For TFT displays, either an addressed palette value or true color value is passed directly
to the output display drivers, bypassing the gray scaling algorithmic logic.
In addition to data formatting, the LCD controller provides a set of programmable display
control signals, including:
The LCD controller generates individual interrupts for:
Pin name
LCDVD[9:8]
LCDVD[10]
LCDVD[11]
LCDVD[15:12]
LCDVD[17:16]
LCDVD[18]
LCDVD[19]
LCDVD[23:20]
•
•
•
•
•
•
•
•
•
An actual true display gray or color value.
An address to a 256x16 bit wide palette RAM gray or color value.
LCD panel power enable.
Pixel clock.
Horizontal and vertical synchronization pulses.
Display bias.
Upper or lower panel DMA FIFO underflow.
Base address update signification.
Vertical compare.
12-bit, 4:4:4
GREEN[3:0]
BLUE[3:0]
Rev. 04 — 26 August 2009
(18 pins)
mode
-
-
-
-
-
-
16-bit, 5:6:5
GREEN[5:2]
GREEN[0]
GREEN[1]
BLUE[4:1]
(22 pins)
BLUE[0]
mode
-
-
-
Chapter 12: LPC24XX LCD controller
16-bit, 1:5:5:5
GREEN[4:1]
GREEN[0]
BLUE[4:1]
(24 pins)
BLUE[0]
Intensity
Intensity
mode
-
-
UM10237
© NXP B.V. 2009. All rights reserved.
GREEN[1:0]
GREEN[7:4]
GREEN[2]
GREEN[3]
BLUE[1:0]
BLUE[7:4]
(30 pins)
BLUE[2]
BLUE[3]
24-bit
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