LPC2458FET180,551 NXP Semiconductors, LPC2458FET180,551 Datasheet - Page 490

• Manufacturer Part Number: LPC2458FET180,551
• Description: IC ARM7 MCU FLASH 512K 180TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2458FET180,551

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 136
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 98K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 180-TFBGA
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN, Ethernet, I2C, I2S, IrDA, SPI, SSP, UART, USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, SAB-TFBGA180
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• On-chip Dac: 10 bit, 1 Channel
• Package: 180TFBGA
• Device Core: ARM7TDMI-S
• Family Name: LPC2000
• Maximum Speed: 72 MHz
• For Use With: 622-1023 - BOARD SCKT ADAPTER FOR TFBGA180622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4258; 935282454551; LPC2458FET180-S

NXP Semiconductors
UM10237_4
User manual
8.9.1 ID index field
8.10 Receive Identifier Register (CAN1RID - 0xE004 4024, CAN2RID -
8.11 Receive Data Register A (CAN1RDA - 0xE004 4028, CAN2RDA -
The ID Index is a 10-bit field in the Info Register that contains the table position of the ID
Look-up Table if the currently received message was accepted. The software can use this
index to simplify message transfers from the Receive Buffer into the Shared Message
Memory. Whenever bit 10 (BP) of the ID Index in the CANRFS register is 1, the current
CAN message was received in acceptance filter bypass mode.
0xE004 8024)
This register contains the Identifier field of the current received message. It is read-only in
normal operation but can be written for testing purposes if the RM bit in CANmod is 1. It
has two different formats depending on the FF bit in CANRFS. See
details on specific CAN channel register address.
Table 429. Receive Identifier Register (CAN1RID - address 0xE004 4024, CAN2RID - address
Table 430. RX Identifier register when FF = 1
0xE004 8028)
This register contains the first 1-4 Data bytes of the current received message. It is
read-only in normal operation, but can be written for testing purposes if the RM bit in
CANMOD is 1. See
Table 431. Receive Data register A (CAN1RDA - address 0xE004 4028, CAN2RDA - address
Bit
10:0
31:11 -
Bit
28:0
31:29 -
Bit
7:0
Symbol Function
ID
Symbol Function
ID
Symbol Function
Data 1
0xE004 8024) bit description
0xE004 8028) bit description
The 11 bit Identifier field of the current received
message. In CAN 2.0A, these bits are called ID10-0,
while in CAN 2.0B they’re called ID29-18.
Reserved, user software should not write ones to
reserved bits. The value read from a reserved bit is not
defined.
The 29 bit Identifier field of the current received
message. In CAN 2.0B these bits are called ID29-0.
Reserved, user software should not write ones to
reserved bits. The value read from a reserved bit is not
defined.
If the DLC field in CANRFS
of the current received message.
Table 18–417
Rev. 04 — 26 August 2009
for details on specific CAN channel register address.
Chapter 18: LPC24XX CAN controllers CAN1/2
≥
0001, this contains the first Data byte
Table 18–417
Reset Value RM Set
0
NA
Reset Value RM Set
0
NA
UM10237
© NXP B.V. 2009. All rights reserved.
Reset
Value
0
490 of 792
X
X
for
RM
Set
X