LPC2458FET180,551 NXP Semiconductors, LPC2458FET180,551 Datasheet - Page 246
LPC2458FET180,551
Manufacturer Part Number
LPC2458FET180,551
Description
IC ARM7 MCU FLASH 512K 180TFBGA
Manufacturer
NXP Semiconductors
Series
LPC2400r
Specifications of LPC2458FET180,551
Core Processor
ARM7
Core Size
16/32-Bit
Speed
72MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
136
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
98K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
180-TFBGA
Processor Series
LPC24
Core
ARM7TDMI-S
Data Bus Width
32 bit
Data Ram Size
98 KB
Interface Type
CAN, Ethernet, I2C, I2S, IrDA, SPI, SSP, UART, USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
136
Number Of Timers
4
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, SAB-TFBGA180
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
On-chip Dac
10 bit, 1 Channel
Package
180TFBGA
Device Core
ARM7TDMI-S
Family Name
LPC2000
Maximum Speed
72 MHz
For Use With
622-1023 - BOARD SCKT ADAPTER FOR TFBGA180622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
568-4258
935282454551
LPC2458FET180-S
935282454551
LPC2458FET180-S
Available stocks
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Manufacturer
Quantity
Price
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Part Number:
LPC2458FET180,551
Manufacturer:
MICROCHIP
Quantity:
1 103
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Part Number:
LPC2458FET180,551
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UM10237_4
User manual
Each transmit descriptor takes two word locations (8 bytes) in memory. Likewise each
status field takes one word (4 bytes) in memory. Each transmit descriptor consists of a
pointer to the data buffer containing transmit data (Packet) and a control word (Control).
The Packet field has a zero address offset, whereas the control field has a 4 byte address
offset, see
Table 238. Transmit descriptor fields
The data buffer pointer (Packet) is a 32 bit, byte aligned address value containing the
base address of the data buffer. The definition of the control word bits is listed in
Table
Table 239. Transmit descriptor control word
Table 11–240
Table 240. Transmit status fields
The transmit status consists of one word which is the StatusInfo word. It contains flags
returned by the MAC and flags generated by the transmit datapath reflecting the status of
the transmission.
Symbol
Packet
Control
Bit
10:0
25:11 -
26
27
28
29
30
31
Symbol
StatusInfo
11–239.
Symbol
Size
Override
Huge
Pad
CRC
Last
Interrupt
Address offset
0x0
0x4
Table
shows the one field transmit status.
Address
offset
0x0
11–238.
Table 11–241
Description
Size in bytes of the data buffer. This is the size of the frame or fragment as it
needs to be fetched by the DMA manager. In most cases it will be equal to the
byte size of the data buffer pointed to by the Packet field of the descriptor. Size
is -1 encoded e.g. a buffer of 8 bytes is encoded as the Size value 7.
Unused
Per frame override. If true, bits 30:27 will override the defaults from the MAC
internal registers. If false, bits 30:27 will be ignored and the default values
from the MAC will be used.
If true, enables huge frame, allowing unlimited frame sizes. When false,
prevents transmission of more than the maximum frame length (MAXF[15:0]).
If true, pad short frames to 64 bytes.
If true, append a hardware CRC to the frame.
If true, indicates that this is the descriptor for the last fragment in the transmit
frame. If false, the fragment from the next descriptor should be appended.
If true, a TxDone interrupt will be generated when the data in this frame or
frame fragment has been sent and the associated status information has been
committed to memory.
Rev. 04 — 26 August 2009
Bytes
4
4
Bytes
4
lists the bit definitions in the StatusInfo word.
Description
Base address of the data buffer containing transmit data.
Control information, see
Description
Transmit status return flags, see
Chapter 11: LPC24XX Ethernet
Table
11–239.
UM10237
© NXP B.V. 2009. All rights reserved.
Table
11–241.
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