LPC2458FET180,551 NXP Semiconductors, LPC2458FET180,551 Datasheet - Page 351

IC ARM7 MCU FLASH 512K 180TFBGA

LPC2458FET180,551

Manufacturer Part Number
LPC2458FET180,551
Description
IC ARM7 MCU FLASH 512K 180TFBGA
Manufacturer
NXP Semiconductors
Series
LPC2400r
Datasheets

Specifications of LPC2458FET180,551

Core Processor
ARM7
Core Size
16/32-Bit
Speed
72MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
136
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
98K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
180-TFBGA
Processor Series
LPC24
Core
ARM7TDMI-S
Data Bus Width
32 bit
Data Ram Size
98 KB
Interface Type
CAN, Ethernet, I2C, I2S, IrDA, SPI, SSP, UART, USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
136
Number Of Timers
4
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, SAB-TFBGA180
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
On-chip Dac
10 bit, 1 Channel
Package
180TFBGA
Device Core
ARM7TDMI-S
Family Name
LPC2000
Maximum Speed
72 MHz
For Use With
622-1023 - BOARD SCKT ADAPTER FOR TFBGA180622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
568-4258
935282454551
LPC2458FET180-S

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Price
Part Number:
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NXP Semiconductors
UM10237_4
User manual
9.6.3 USB Transmit Data register (USBTxData - 0xFFE0 C21C)
9.6.4 USB Transmit Packet Length register (USBTxPLen - 0xFFE0 C224)
Table 322. USB Receive Packet Length register (USBRxPlen - address 0xFFE0 C220) bit
For an IN transaction, the CPU writes the endpoint data into this register. Before writing to
this register, the WR_EN bit and LOG_ENDPOINT field of the USBCtrl register should be
set appropriately, and the packet length should be written to the USBTxPlen register. On
writing this register, the data is written to the selected endpoint buffer. The data is in little
endian format: the first byte sent on the USB bus will be the least significant byte of
USBTxData. USBTxData is a write only register.
Table 323. USB Transmit Data register (USBTxData - address 0xFFE0 C21C) bit description
This register contains the number of bytes transferred from the CPU to the selected
endpoint buffer. Before writing data to USBTxData, software should first write the packet
length (≤ MaxPacketSize) to this register. After each write to USBTxData, hardware
decrements USBTxPLen by 4. The WR_EN bit and LOG_ENDPOINT field of the USBCtrl
register should be set to select the desired endpoint buffer before starting this process.
For data buffers larger than the endpoint’s MaxPacketSize, software should submit data in
packets of MaxPacketSize, and send the remaining extra bytes in the last packet. For
example, if the MaxPacketSize is 64 bytes and the data buffer to be transferred is of
length 130 bytes, then the software sends two 64-byte packets and the remaining 2 bytes
in the last packet. So, a total of 3 packets are sent on USB. USBTxPLen is a write only
register.
Bit
9:0
10
11
31:12 -
Bit
31:0
Symbol
PKT_LNGTH -
DV
PKT_RDY
Symbol
TX_DATA
description
Value Description
0
1
-
-
Rev. 04 — 26 August 2009
Description
Transmit Data.
The remaining number of bytes to be read from the
currently selected endpoint’s buffer. When this field
decrements to 0, the RxENDPKT bit will be set in
USBDevIntSt.
Data valid. This bit is useful for isochronous endpoints.
Non-isochronous endpoints do not raise an interrupt when
an erroneous data packet is received. But invalid data
packet can be produced with a bus reset. For isochronous
endpoints, data transfer will happen even if an erroneous
packet is received. In this case DV bit will not be set for the
packet.
Data is invalid.
Data is valid.
The PKT_LNGTH field is valid and the packet is ready for
reading.
Reserved, user software should not write ones to reserved
bits. The value read from a reserved bit is not defined.
Chapter 13: LPC24XX USB device controller
UM10237
© NXP B.V. 2009. All rights reserved.
Reset value
0x0000 0000
351 of 792
Reset
value
0
0
0
NA

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