LPC2458FET180,551 NXP Semiconductors, LPC2458FET180,551 Datasheet - Page 334
LPC2458FET180,551
Manufacturer Part Number
LPC2458FET180,551
Description
IC ARM7 MCU FLASH 512K 180TFBGA
Manufacturer
NXP Semiconductors
Series
LPC2400r
Specifications of LPC2458FET180,551
Core Processor
ARM7
Core Size
16/32-Bit
Speed
72MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
136
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
98K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
180-TFBGA
Processor Series
LPC24
Core
ARM7TDMI-S
Data Bus Width
32 bit
Data Ram Size
98 KB
Interface Type
CAN, Ethernet, I2C, I2S, IrDA, SPI, SSP, UART, USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
136
Number Of Timers
4
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, SAB-TFBGA180
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
On-chip Dac
10 bit, 1 Channel
Package
180TFBGA
Device Core
ARM7TDMI-S
Family Name
LPC2000
Maximum Speed
72 MHz
For Use With
622-1023 - BOARD SCKT ADAPTER FOR TFBGA180622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
568-4258
935282454551
LPC2458FET180-S
935282454551
LPC2458FET180-S
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC2458FET180,551
Manufacturer:
MICROCHIP
Quantity:
1 103
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Part Number:
LPC2458FET180,551
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7. Pin description
8. Clocking and power management
UM10237_4
User manual
7.1 USB device usage note
Once data has been received or sent, the endpoint buffer can be read or written. How this
is accomplished depends on the endpoint’s type and operating mode. The two operating
modes for each endpoint are Slave (CPU-controlled) mode, and DMA mode.
In Slave mode, the CPU transfers data between RAM and the endpoint buffer using the
Register Interface. See
this mode.
In DMA mode, the DMA transfers data between RAM and the endpoint buffer. See
Section 13–14 “DMA operation”
The device controller can access two USB ports indicated by suffixes 1 and 2 in the USB
pin names and referred to as USB port 1 (U1) and USB port 2 (U2) in the following text.
Table 291. USB device pin description
The USB device interface can be routed to either USB port1 (using USB_CONNECT1,
USB_UP_LED1, USB_D+1, USB_D−1) or USB port2 (using USB_CONNECT2,
USB_UP_LED2, USB_D+2, USB_D−2) to allow for more versatile pin multiplexing (see
Section 13–9.1.1 “USB Port Select register (USBPortSel - 0xFFE0
To use both ports for USB transfer, port1 has to be configured as host and port2 has to be
configured as device. See
device” on page 399
The USB device/host/OTG controller is disabled after RESET and must be enabled by
writing a 1 to the PCUSB bit in the PCONP register, see
This section describes the clocking and power management features of the USB Device
Controller.
Name
V
USB_CONNECT1,
USB_CONNECT2
USB_UP_LED1,
USB_UP_LED2
USB_D+1, USB_D+2
USB_D − 1, USB_D − 2
BUS
for details.
Rev. 04 — 26 August 2009
Section 13–13 “Slave mode operation”
Section 15–6.3 “Connecting USB as one port host and one port
Direction
I
O
O
I/O
I/O
for a detailed description of this mode.
Description
V
via its corresponding PINSEL register, it is driven
HIGH internally.
SoftConnect control signal.
GoodLink LED control signal.
Positive differential data.
Negative differential data.
Chapter 13: LPC24XX USB device controller
BUS
status input. When this function is not enabled
Table
for a detailed description of
4–63.
C110)”).
UM10237
© NXP B.V. 2009. All rights reserved.
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