LPC2458FET180,551 NXP Semiconductors, LPC2458FET180,551 Datasheet - Page 389

• Manufacturer Part Number: LPC2458FET180,551
• Description: IC ARM7 MCU FLASH 512K 180TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2458FET180,551

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 136
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 98K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 180-TFBGA
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN, Ethernet, I2C, I2S, IrDA, SPI, SSP, UART, USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, SAB-TFBGA180
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• On-chip Dac: 10 bit, 1 Channel
• Package: 180TFBGA
• Device Core: ARM7TDMI-S
• Family Name: LPC2000
• Maximum Speed: 72 MHz
• For Use With: 622-1023 - BOARD SCKT ADAPTER FOR TFBGA180622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4258; 935282454551; LPC2458FET180-S

1. Basic configuration
2. Introduction
UM10237_4
User manual
2.1 Features
The USB controller is configured using the following registers:
This section describes the host portion of the USB 2.0 OTG dual role core which
integrates the host controller (OHCI compliant), device controller and I2C. The I2C
interface controls the external OTG ATX.
The USB is a 4 wire bus that supports communication between a host and a number (127
max.) of peripherals. The host controller allocates the USB bandwidth to attached devices
through a token based protocol. The bus supports hot plugging, un-plugging and dynamic
configuration of the devices. All transactions are initiated by the host controller.
The host controller enables data exchange with various USB devices attached to the bus.
It consists of register interface, serial interface engine and DMA controller. The register
interface complies to the OHCI specification.
Table 358. USB (OHCI) related acronyms and abbreviations used in this chapter
Acronym/abbreviation
AHB
ATX
DMA
FS
LS
OHCI
USB
1. Power: In the PCONP register
2. Clock: see
3. Pins: Select USB pins and their modes in PINSEL0 to PINSEL5 and PINMODE0 to
4. Wakeup: Use the INTWAKE register
5. Interrupts: Interrupts are enabled in the VIC using the VICIntEnable register
6. Initialization: see
•
UM10237
Chapter 14: LPC24XX USB Host controller
Rev. 04 — 26 August 2009
Remark: On reset, the USB block is disabled (PCUSB = 0).
PINMODE5
port to wakeup the microcontroller from Power-down mode.
(Table
OHCI compliant.
7–106).
Table
(Section
4–54.
Section
Rev. 04 — 26 August 2009
9–5).
15–10.
(Table
(Table
4–63), set bit PCUSB.
4–62) to enable activity on the USB bus
Description
Advanced High-Performance Bus
Analog Transceiver
Direct Memory Access
Full Speed
Low Speed
Open Host Controller Interface
Universal Serial Bus
© NXP B.V. 2009. All rights reserved.
User manual
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