LPC2458FET180,551 NXP Semiconductors, LPC2458FET180,551 Datasheet - Page 369

• Manufacturer Part Number: LPC2458FET180,551
• Description: IC ARM7 MCU FLASH 512K 180TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2458FET180,551

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 136
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 98K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 180-TFBGA
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN, Ethernet, I2C, I2S, IrDA, SPI, SSP, UART, USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, SAB-TFBGA180
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• On-chip Dac: 10 bit, 1 Channel
• Package: 180TFBGA
• Device Core: ARM7TDMI-S
• Family Name: LPC2000
• Maximum Speed: 72 MHz
• For Use With: 622-1023 - BOARD SCKT ADAPTER FOR TFBGA180622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4258; 935282454551; LPC2458FET180-S

NXP Semiconductors
UM10237_4
User manual
11.10 Select Endpoint (Command: 0x00 - 0x1F, Data: read 1 byte (optional))
The Select Endpoint command initializes an internal pointer to the start of the selected
buffer in EP_RAM. Optionally, this command can be followed by a data read, which
returns some additional information on the packet(s) in the endpoint buffer(s). The
command code of the Select Endpoint command is equal to the physical endpoint
number. In the case of a single buffered endpoint the B_2_FULL bit is not valid.
Table 354. Select Endpoint Register bit description
Bit Symbol
0
1
2
3
4
5
FE
ST
STP
PO
EPN
B_1_FULL
Value Description
0
1
0
1
0
1
0
1
0
1
0
1
Rev. 04 — 26 August 2009
Full/Empty. This bit indicates the full or empty status of the
endpoint buffer(s). For IN endpoints, the FE bit gives the
ANDed result of the B_1_FULL and B_2_FULL bits. For OUT
endpoints, the FE bit gives ORed result of the B_1_FULL and
B_2_FULL bits. For single buffered endpoints, this bit simply
reflects the status of B_1_FULL.
For an IN endpoint, at least one write endpoint buffer is empty.
For an OUT endpoint, at least one endpoint read buffer is full.
Stalled endpoint indicator.
The selected endpoint is not stalled.
The selected endpoint is stalled.
SETUP bit: the value of this bit is updated after each
successfully received packet (i.e. an ACKed package on that
particular physical endpoint).
The STP bit is cleared by doing a Select Endpoint/Clear
Interrupt on this endpoint.
The last received packet for the selected endpoint was a
SETUP packet.
Packet over-written bit.
The PO bit is cleared by the ‘Select Endpoint/Clear Interrupt’
command.
The previously received packet was over-written by a SETUP
packet.
EP NAKed bit indicates sending of a NAK. If the host sends an
OUT packet to a filled OUT buffer, the device returns NAK. If
the host sends an IN token packet to an empty IN buffer, the
device returns NAK.
The EPN bit is reset after the device has sent an ACK after an
OUT packet or when the device has seen an ACK after sending
an IN packet.
The EPN bit is set when a NAK is sent and the interrupt on NAK
feature is enabled.
The buffer 1 status.
Buffer 1 is empty.
Buffer 1 is full.
Chapter 13: LPC24XX USB device controller
UM10237
© NXP B.V. 2009. All rights reserved.
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Reset
value
0
0
0
0
0
0