LPC2458FET180,551 NXP Semiconductors, LPC2458FET180,551 Datasheet - Page 603

• Manufacturer Part Number: LPC2458FET180,551
• Description: IC ARM7 MCU FLASH 512K 180TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2458FET180,551

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 136
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 98K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 180-TFBGA
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN, Ethernet, I2C, I2S, IrDA, SPI, SSP, UART, USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, SAB-TFBGA180
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• On-chip Dac: 10 bit, 1 Channel
• Package: 180TFBGA
• Device Core: ARM7TDMI-S
• Family Name: LPC2000
• Maximum Speed: 72 MHz
• For Use With: 622-1023 - BOARD SCKT ADAPTER FOR TFBGA180622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4258; 935282454551; LPC2458FET180-S

NXP Semiconductors
10. Software example
UM10237_4
User manual
9.12.2 I
9.12.3 The state service routines
9.12.4 Adapting state services to an application
10.1 Initialization routine
10.2 Start master transmit function
10.3 Start master receive function
The I
call. If the general call or the own slave address is detected, an interrupt is requested and
I2STAT is loaded with the appropriate state information.
When the I
the 26 state services to be executed.
Each state routine is part of the I
The state service examples show the typical actions that must be performed in response
to the 26 I
associated state services can be omitted, as long as care is taken that the those states
can never occur.
In an application, it may be desirable to implement some kind of timeout during I
operations, in order to trap an inoperative bus or a lost service routine.
Example to initialize I
Begin a Master Transmit operation by setting up the buffer, pointer, and data count, then
initiating a Start.
Begin a Master Receive operation by setting up the buffer, pointer, and data count, then
initiating a Start.
2
1. Load I2ADR with own Slave Address, enable general call recognition if needed.
2. Enable I
3. Write 0x44 to I2CONSET to set the I2EN and AA bits, enabling Slave functions. For
1. Initialize Master data counter.
2. Set up the Slave Address to which data will be transmitted, and add the Write bit.
3. Write 0x20 to I2CONSET to set the STA bit.
4. Set up data to be transmitted in Master Transmit buffer.
5. Initialize the Master data counter to match the length of the message being sent.
6. Exit
1. Initialize Master data counter.
C interrupt service
Master only functions, write 0x40 to I2CONSET.
2
C hardware now begins checking the I
2
C state codes. If one or more of the four I
2
C interrupt is entered, I2STAT contains a status code which identifies one of
2
C interrupt.
2
C Interface as a Slave and/or Master.
Rev. 04 — 26 August 2009
2
C interrupt routine and handles one of the 26 states.
Chapter 22: LPC24XX I
2
C bus for its own slave address and general
2
C operating modes are not used, the
2
C interfaces I
UM10237
© NXP B.V. 2009. All rights reserved.
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C
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