MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 1038

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Memory Map
A-34
from Module Base
Address Offset
0x18C–0x1F0
0x1F8–0x1FF
0x154–0x17F
0x150
0x180
0x184
0x188
0x1F4
0x0C
0x1C
0x2C
0x3C
0x00
0x04
0x08
0x10
0x14
0x18
0x20
0x24
0x28
0x30
0x34
0x38
0x40
0x44
MPC5125 Microcontroller Reference Manual, Rev. 2, Release Candidate
ETH_R_FSTART—FIFO Receive Start Register
Reserved
ETH_R_DES_START—Beginning of Receive Descriptor
Ring
ETH_X_DES_START—Beginning of Transmit Descriptor
Ring
ETH_R_BUFF_SIZE—Receive Buffer Size Register
Reserved
ETH_DMA_CONTROL—DMA Function Control Register
Reserved
GPT0 Enable and Mode Select Register (GPT_MODE)
GPT0 Counter Input and up/down counter Output
Register (GPT_COUNTER)
GPT0 PWM Configuration Register (GPT_PWM)
GPT0 Status Register (GPT_STATUS)
GPT1 Enable and Mode Select Register (GPT_MODE)
GPT1 Counter Input and up/down counter Output
Register (GPT_COUNTER)
GPT1 PWM Configuration Register (GPT_PWM)
GPT1 Status Register (GPT_STATUS)
GPT2 Enable and Mode Select Register (GPT_MODE)
GPT2 Counter Input and up/down counter Output
Register (GPT_COUNTER)
GPT2 PWM Configuration Register (GPT_PWM)
GPT2 Status Register (GPT_STATUS)
GPT3 Enable and Mode Select Register (GPT_MODE)
GPT3 Counter Input and up/down counter Output
Register (GPT_COUNTER)
GPT3 PWM Configuration Register (GPT_PWM)
GPT3 Status Register (GPT_STATUS)
GPT4 Enable and Mode Select Register (GPT_MODE)
GPT4 Counter Input and up/down counter Output
Register (GPT_COUNTER)
Table A-2. MPC5125 Detailed Register Map (continued)
General Purpose Timer (GPT2) 0xFF40_5000
Chapter 15, “General Purpose Timers (GPT)”
Register
Access Reset Value
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
2
R
R
R
R
0x0000_0500
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0xU000_0000
—
—
—
Freescale Semiconductor
3
3
3
1
14.3.5.22/14-30
14.3.5.23/14-30
14.3.5.24/14-31
14.3.5.25/14-32
14.3.5.26/14-32
Section/Page
15.2.1.1/15-4
15.2.1.2/15-7
15.2.1.3/15-8
15.2.1.4/15-9
15.2.1.1/15-4
15.2.1.2/15-7
15.2.1.3/15-8
15.2.1.4/15-9
15.2.1.1/15-4
15.2.1.2/15-7
15.2.1.3/15-8
15.2.1.4/15-9
15.2.1.1/15-4
15.2.1.2/15-7
15.2.1.3/15-8
15.2.1.4/15-9
15.2.1.1/15-4
15.2.1.2/15-7