MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 884

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Universal Serial Bus Interface with On-The-Go
Figure 32-42
with the controller reset bit. Therefore, it is also necessary for the OTG tasks to be performed independent
of a controller reset as well as independent of the controller mode.
To this end, the following list contains the register bits used for OTG operations, which are independent
of the controller mode and are also not affected by a write to the reset bit in the USB_USBCMD register.
32.4.2
The hardware assist provides automated response and sequencing that may not be possible to software
with significant interrupt latency response times. The use of this additional circuitry is optional and can be
used to assist the three sequences below.
32.4.2.1
When the HAAR is set to one, the host automatically starts a reset after a connect event. This shortcuts the
normal process where software is notified of the connect event and starts the reset. Software receives
notification of the connect event, but should not write the reset bit when the HAAR is set. Software is
32-56
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All Identification Registers
All Device/Host Capability Registers
USB_OTGSC: All bits
USB_PORTSCn:
— Physical Interface Select
— Physical Interface Serial Select
— Physical Interface Data Width
— Physical Interface Low Power
— Physical Interface Wake Signals
— Port Indicators
— Port Power
Hardware Assist
Auto-Reset
also shows that the only way to transition the controller mode out of host or device mode is
Write 10 to USB_USBMODE
USB_USBCMD[Reset] = 1
MPC5125 Microcontroller Reference Manual, Rev. 2
Device (10)
Figure 32-42. Controller Mode
Idle (00)
Write 11 to USB_USBMODE
Host (11)
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