MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 775

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

28.3
The SDHC module contains 14 32-bit registers. This section provides the detailed descriptions for all
SDHC registers. All registers must be accessed as 32-bit values. Byte/half word access is not allowed.
28.3.1
Table 28-3
accesses to reserved locations return 0. To ensure compatibility with possible future revisions of this
module, do not access reserved regions.
Freescale Semiconductor
SDHC1: 0xFF40_1500
SDHC2: 0xFF40_5100
MMC_SD_CLK This signal is the MMC/SD/SDIO card clock signal. The direction is from host to card. The frequency is
SDHC_BASE
Signal
DAT0
DAT1
DAT2
DAT3
CMD
Offset from
0x0C
0x1C
0x00
0x04
0x08
0x10
0x14
0x18
0x20
Memory Map and Register Definition
shows the SDHC memory map. Write accesses to the reserved region are ignored. Read
Memory Map
referenced to the system clock.
This is a bidirectional signal. It is for card initialization and data transfer commands.
This is a bidirectional signal for data transmission both in 1-bit and 4-bit mode.
This is a bidirectional signal for data transmission or interrupt signal in 4-bit mode and is for interrupt signal
when SDHC works in 1-bit mode.
This is a bidirectional signal for data transmission or read wait in 4-bit mode and is for read/wait when SDHC
works in 1-bit mode.
This is a bidirectional signal for data transmission in 4-bit mode. This signal is not used in 1-bit mode. This
signal is also used for card detect in both 4-bit and 1-bit modes.
1
SDHC_STR_STP_CLK—SDHC Clock Control Register
SDHC_STATUS—SDHC Status Register
SDHC_CLK_RATE—SDHC Card Clock Rate Register
SDHC_CMD_DAT_CONT—SDHC Command and Data
Control Register
SDHC_RES_TO—SDHC Response Time-out Register
SDHC_READ_TO—SDHC Read Time-out Register
SDHC_BLK_LEN—SDHC Block Length Register
SDHC_NOB—SDHC Number of Block Register
SDHC_REV_NO—SDHC Revision Number Register
MPC5125 Microcontroller Reference Manual, Rev. 2
Table 28-2. Detailed Signal Descriptions
Table 28-3. SDHC memory map
Register
Descriptions
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
Secure Digital Host Controller (SDHC)
2
0x0000_FFFF
0x0000_0000
0x0000_0000
0x0000_0008
0x0000_0000
0x0000_0040
0x0000_0000
0x0000_0000
0x0000_0400
Reset Value
28.3.2.4/28-10
28.3.2.5/28-12
28.3.2.6/28-13
28.3.2.7/28-14
28.3.2.8/28-15
28.3.2.9/28-16
Section/Page
28.3.2.1/28-4
28.3.2.2/28-5
28.3.2.3/28-9
28-3