MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 599

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

22.3.2.11 MSCAN Transmitter Buffer Selection (CANTBSEL)
This register allows the selection of the actual transmit message buffer, which is then accessible in the
CANTXFG register space.
Read: Find the lowest ordered bit set to 1, all other bits are read as 0
Write: Anytime when not in initialization mode
The following gives a short programming example of usage of the CANTBSEL register:
To get the next available transmit buffer, application software must read the CANTFLG register and write
this value back into the CANTBSEL register. In this example Tx buffers TX1 and TX2 are available. The
value read from CANTFLG is therefore 0b0000_0110. When writing this value back to CANTBSEL, the
Tx buffer TX1 is selected in the CANTXFG because the lowest numbered bit set to 1 is at bit position 1.
Reading back this value out of CANTBSEL results in 0b0000_0010, because only the lowest numbered
bit position set to 1 is presented. This mechanism eases the application software the selection of the next
available Tx buffer.
If all transmit message buffers are deselected, no accesses are allowed to the CANTXFG registers.
Freescale Semiconductor
Address: Base + 0x14
•
•
•
TX[2:0]
Reset
Field
LDD CANTFLG; value read is 0b0000_0110
STD CANTBSEL; value written is 0b0000_0110
LDD CANTBSEL; value read is 0b0000_0010
W
R
The CANTBSEL register is held in the reset state when the initialization
mode is active (INITRQ = 1 and INITAK = 1). This register is writable
again upon exiting the initialization mode (INITRQ = 0 and INITAK = 0).
Transmit Buffer Select. The lowest numbered bit places the respective transmit buffer in the CANTXFG
register space (e.g., TX1 = 1 and TX0 = 1 selects transmit buffer TX0; TX1 = 1 and TX0 = 0 selects transmit
buffer TX1). Read and write accesses to the selected transmit buffer are blocked if the corresponding TXEx
bit is cleared and the buffer is scheduled for transmission (see
Register
0 The associated message buffer is deselected.
1 The associated message Buffer is selected, if lowest numbered bit.
0
0
0
Figure 22-13. MSCAN Transmitter Buffer Selection (CANTBSEL)
(CANTFLG)”).
1
0
0
MPC5125 Microcontroller Reference Manual, Rev. 2
Table 22-14. CANTBSEL field descriptions
0
0
2
NOTE
0
0
3
Description
0
0
4
Section 22.3.2.7, “MSCAN Transmitter Flag
TX2
0
5
Access: User read/write
TX1
0
6
TX0
0
7
MSCAN
22-21