MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 194

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Byte Data Link Controller (BDLC)
6-58
For interrupt driven systems,
this marks the beginning of
the transmit section of the
BDLC module interrupt
service routine
NOTE: The EOF and CRC Error Interrupts are handled in the BDLC Module Receive Routine
Jump to BDLC module
BREAK/Error handling
Go to BDLC Module
receive routine
routine
B
C
Figure 6-26. Basic BDLC Module Transmit Flowchart
Yes
Yes
Yes
MPC5125 Microcontroller Reference Manual, Rev. 2
byte to be transmitted
Load next byte to be
Enter BDLC module
into BDLC_DLCBDR
Write first message
DLCBSVR=0x1C?
DLCBSVR=0x10?
DLCBSVR=0x14?
DLCBSVR=0x00?
BDLC_DLCBDR
transmitted into
transmit routine
(invalid symbol)
(clears TDRE)
BDLC_
(TDRE)
BDLC_
BDLC_
BDLC_
(LOA)
A
No
No
No
Yes
No
B
No
BDLC_DLCBCR2[TEOD]
detects EOF, transmit
attempt is complete
After BDLC module
Exit BDLC module
Attempt another
transmit routine
IFR received?
transmission?
Is this the last
No
byte?
Set
A
No
Yes
Yes
Yes
Freescale Semiconductor
Jump to receive IFR
handling routine
C