MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 262

IC MCU 32BIT E300 324TEPBGA

MPC5125YVN400

Manufacturer Part Number
MPC5125YVN400
Description
IC MCU 32BIT E300 324TEPBGA
Manufacturer
Freescale Semiconductor
Series
MPC51xxr

Specifications of MPC5125YVN400

Core Processor
e300
Core Size
32-Bit
Speed
400MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, USB OTG
Peripherals
DMA, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.33 V ~ 1.47 V
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
324-PBGA
Processor Series
MPC51xx
Core
e300
Data Bus Width
32 bit
Development Tools By Supplier
TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
Maximum Clock Frequency
400 MHz
Operating Supply Voltage
1.4 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Data Ram Size
32 KB
I/o Voltage
3.3 V
Interface Type
CAN, I2C
Minimum Operating Temperature
- 40 C
Program Memory Size
32 bit
Cpu Speed
400MHz
Embedded Interface Type
CAN, I2C, SPI, UART, USB
Digital Ic Case Style
TEPBGA
No. Of Pins
324
Rohs Compliant
Yes
Cpu Family
MPC5xx
Device Core Size
32b
Frequency (max)
400MHz
Total Internal Ram Size
32KB
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
324
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Direct Memory Access (DMA)
the programmer’s model, but it would be unclear whether the actual link was made before the channel
retired.
The following coherency model is recommended when executing a dynamic channel link or dynamic
scatter/gather request:
This same coherency model is true for dynamic scatter/gather operations. For both dynamic requests, the
TCD local memory controller forces the TCD.MAJOR.E_LINK and TCD.E_SG bits to 0 on any writes to
a channel’s TCD.WORD7 after that channel’s TCD.DONE bit is set, indicating the major loop is complete.
9-42
1. Set the TCD.MAJOR.E_LINK bit.
2. Read back the TCD.MAJOR.E_LINK bit.
3. Test the TCD.MAJOR.E_LINK request status.
4. If the bit is set, the dynamic link attempt was successful.
5. If the bit is cleared, the attempted dynamic link did not succeed. The channel was already retiring.
Clear the TCD.DONE bit before writing the TCD.MAJOR.E_LINK or
TCD.E_SG bits. The TCD.DONE bit is cleared automatically by the
DMA_ENGINE after a channel begins execution.
MPC5125 Microcontroller Reference Manual, Rev. 2
NOTE
Freescale Semiconductor

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