MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 158

IC MCU 32BIT E300 324TEPBGA

MPC5125YVN400

Manufacturer Part Number
MPC5125YVN400
Description
IC MCU 32BIT E300 324TEPBGA
Manufacturer
Freescale Semiconductor
Series
MPC51xxr

Specifications of MPC5125YVN400

Core Processor
e300
Core Size
32-Bit
Speed
400MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, USB OTG
Peripherals
DMA, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.33 V ~ 1.47 V
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
324-PBGA
Processor Series
MPC51xx
Core
e300
Data Bus Width
32 bit
Development Tools By Supplier
TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
Maximum Clock Frequency
400 MHz
Operating Supply Voltage
1.4 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Data Ram Size
32 KB
I/o Voltage
3.3 V
Interface Type
CAN, I2C
Minimum Operating Temperature
- 40 C
Program Memory Size
32 bit
Cpu Speed
400MHz
Embedded Interface Type
CAN, I2C, SPI, UART, USB
Digital Ic Case Style
TEPBGA
No. Of Pins
324
Rohs Compliant
Yes
Cpu Family
MPC5xx
Device Core Size
32b
Frequency (max)
400MHz
Total Internal Ram Size
32KB
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
324
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC5125YVN400
Manufacturer:
Freescale Semiconductor
Quantity:
135
Part Number:
MPC5125YVN400
Manufacturer:
LTC
Quantity:
29
Part Number:
MPC5125YVN400
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Byte Data Link Controller (BDLC)
6.4.2.1
A logic zero is defined as either an active to passive transition followed by a passive period 64 µs in length,
or a passive to active transition followed by an active period 128 µs in length (see
6.4.2.2
A logic one is defined as either an active to passive transition followed by a passive period 128 µs in
length, or a passive to active transition followed by an active period 64 µs in length (see
6-22
Passive
Passive
Active
Active
Logic 0
Logic 1
Passive
Passive
Active
Active
Passive
(c) Start of Frame
(e) End of Frame
Active
MPC5125 Microcontroller Reference Manual, Rev. 2
200 µ s
280 µ s
Figure 6-12. J1850 VPW Symbols
(g) Inter-Frame Separator (IFS)
128 µ s
128 µ s
EOD
(a) Logic 0
(b) Logic 1
EOF
OR
OR
(d) End of Data
300 µ s
(f) Break
200 µ s
240 µ s
20 µ s
64 µ s
64 µ s
Figure
Freescale Semiconductor
Figure 6-12
6-12(a)).
(b)).

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