HD64F3437STF16V Renesas Electronics America, HD64F3437STF16V Datasheet - Page 150

MCU 3/5V 60K PB-FREE 100-TQFP

HD64F3437STF16V

Manufacturer Part Number
HD64F3437STF16V
Description
MCU 3/5V 60K PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300r
Datasheet

Specifications of HD64F3437STF16V

Core Processor
H8/300
Core Size
8-Bit
Speed
16MHz
Connectivity
Host Interface, I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F3437STF16V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD64F3437STF16V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Port 3 Data Register (P3DR)
P3DR is an 8-bit register that stores data for pins P3
3 is read, the value in P3DR is obtained directly, regardless of the actual pin state. When a P3DDR
bit is cleared to 0, if port 3 is read the pin state is obtained.
P3DR is initialized to H'00 by a reset and in hardware standby mode. In software standby mode it
retains its existing values.
Port 3 Input Pull-Up Control Register (P3PCR)
P3PCR is an 8-bit readable/writable register that controls the input pull-up transistors in port 3. If
a P3DDR bit is cleared to 0 (designating input) and the corresponding P3PCR bit is set to 1, the
input pull-up transistor is turned on.
P3PCR is initialized to H'00 by a reset and in hardware standby mode. In software standby mode it
retains its existing values.
The input pull-ups cannot be used in slave mode (when the host interface is enabled).
118
Bit
Initial value
Read/Write
Bit
Initial value
Read/Write
P3
R/W
R/W
P3
7
7
0
7
PCR P3
0
7
R/W
R/W
P3
6
6
0
6
PCR P3
0
6
R/W
R/W
P3
5
5
0
5
PCR P3
0
5
R/W
R/W
P3
4
4
0
4
PCR P3
0
7
to P3
4
0
. When a P3DDR bit is set to 1, if port
R/W
R/W
P3
3
3
0
3
PCR P3
0
3
R/W
R/W
P3
2
2
0
2
PCR P3
0
2
R/W
R/W
P3
1
1
0
1
PCR P3
0
1
R/W
R/W
P3
0
0
0
0
PCR
0
0

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