HD64F3437STF16V Renesas Electronics America, HD64F3437STF16V Datasheet - Page 19

• Manufacturer Part Number: HD64F3437STF16V
• Description: MCU 3/5V 60K PB-FREE 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300r

Specifications of HD64F3437STF16V

• Core Processor: H8/300
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: Host Interface, I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 1
1.1
1.2
1.3
Section 2
2.1
2.2
2.3
2.4
2.5
2.6
2.7
Overview............................................................................................................................
Block Diagram...................................................................................................................
Pin Assignments and Functions ........................................................................................
1.3.1
1.3.2
Overview............................................................................................................................ 19
2.1.1
2.1.2
2.1.3
Register Descriptions......................................................................................................... 21
2.2.1
2.2.2
2.2.3
Data Formats...................................................................................................................... 23
2.3.1
2.3.2
Addressing Modes ............................................................................................................. 26
2.4.1
2.4.2
Instruction Set.................................................................................................................... 32
2.5.1
2.5.2
2.5.3
2.5.4
2.5.5
2.5.6
2.5.7
2.5.8
CPU States ......................................................................................................................... 49
2.6.1
2.6.2
2.6.3
2.6.4
Access Timing and Bus Cycle........................................................................................... 51
2.7.1
2.7.2
Overview
Pin Arrangement ..................................................................................................
Pin Functions........................................................................................................
CPU
Features ................................................................................................................ 19
Address Space ...................................................................................................... 20
Register Configuration ......................................................................................... 20
General Registers.................................................................................................. 21
Control Registers.................................................................................................. 21
Initial Register Values .......................................................................................... 22
Data Formats in General Registers....................................................................... 24
Memory Data Formats.......................................................................................... 25
Addressing Mode.................................................................................................. 26
Calculation of Effective Address.......................................................................... 28
Data Transfer Instructions .................................................................................... 34
Arithmetic Operations .......................................................................................... 36
Logic Operations .................................................................................................. 37
Shift Operations.................................................................................................... 37
Bit Manipulations ................................................................................................. 39
Branching Instructions.......................................................................................... 44
System Control Instructions ................................................................................. 46
Block Data Transfer Instruction ........................................................................... 47
Overview .............................................................................................................. 49
Program Execution State ...................................................................................... 50
Exception-Handling State .................................................................................... 50
Power-Down State................................................................................................ 51
Access to On-Chip Memory (RAM and ROM) ................................................... 51
Access to On-Chip Register Field and External Devices..................................... 53
..................................................................................................................... 19
...........................................................................................................
Contents
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