HD64F3437STF16V Renesas Electronics America, HD64F3437STF16V Datasheet - Page 437

MCU 3/5V 60K PB-FREE 100-TQFP

HD64F3437STF16V

Manufacturer Part Number
HD64F3437STF16V
Description
MCU 3/5V 60K PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300r
Datasheet

Specifications of HD64F3437STF16V

Core Processor
H8/300
Core Size
8-Bit
Speed
16MHz
Connectivity
Host Interface, I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F3437STF16V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD64F3437STF16V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Sample Multiple-Block Erase Program: This program uses the following registers.
R0:
R1H: Used to test bits 8 to 11 of R0 stores register read data, and also used for dummy write.
R1L: Used to test bits 0 to 11 of R0.
R2:
R3:
R4:
R5:
R6L: Used for prewrite-verify and erase-verify fail count.
Arbitrary blocks can be erased by setting bits in R0. Write R0 with a word transfer instruction.
A bit map of R0 and a sample setting for erasing specific blocks are shown next.
Note: Clear bits 15, 14, 13, and 12 to 0.
Example: to erase blocks LB2, SB7, and SB0
R0 is set as follows:
The setting of #a, #b, #c, #d, and #e values in the program depends on the clock frequency. Set #a,
#b, #c, #d, and #e values according to tables 19.9 (1), (2), and 19.10.
MOV.W
MOV.W
Bit
R0
Bit
R0
Setting
Specifies blocks to be erased (set as explained below), and also stores address used in
prewrite and erase-verify.
Specifies address where address used in prewrite and erase-verify is stored.
Stores address used in prewrite and erase-verify.
Stores last address of block to be erased.
Sets prewrite and erase timing loop counters.
15
15
0
#H'0481,R0
R0,
14
14
0
Corresponds to EBR1
Corresponds to EBR1
13
13
0
@EBR1
12
12
0
LB3 LB2 LB1 LB0 SB7 SB6 SB5 SB4 SB3 SB2 SB1 SB0
LB3 LB2 LB1 LB0 SB7 SB6 SB5 SB4 SB3 SB2 SB1 SB0
11
11
0
10
10
1
9
9
0
8
8
0
7
7
1
6
6
0
Corresponds to EBR2
Corresponds to EBR2
5
5
0
4
4
0
3
3
0
2
2
0
1
1
0
0
0
1
405

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