HD64F3437STF16V Renesas Electronics America, HD64F3437STF16V Datasheet - Page 493

MCU 3/5V 60K PB-FREE 100-TQFP

HD64F3437STF16V

Manufacturer Part Number
HD64F3437STF16V
Description
MCU 3/5V 60K PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300r
Datasheet

Specifications of HD64F3437STF16V

Core Processor
H8/300
Core Size
8-Bit
Speed
16MHz
Connectivity
Host Interface, I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F3437STF16V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD64F3437STF16V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
20.4.6
Flowchart for Erasing One Block
Address + 1
Erasing Flowchart and Sample Program
address
No
(set bit of block to be erased to 1)
Dummy write to verify address
(flash memory latches address)
(clear bit of erased block to 0)
Write 0 data in all addresses
Verify
Clear erase block register
Enable watchdog timer
Select erase-verify mode
to be erased (prewrite)
Set top address in block
Set erase block register
Disable watchdog timer
(EV bit = 1 in FLMCR)
(E bit = 1 in FLMCR)
End of block erase
Select erase mode
as verify address
OK
Wait (t
*4
Wait (t
Last address?
Wait (x) ms
Clear EV bit
Clear E bit
(read data=H'FF?)
n = 1
Start
vs
Figure 20.9 Erasing Flowchart
vs
2) s
1) s
Yes
*5
*6
*6
*1
*2
*3
No go
Erasing
ends
Clear EV bit
Erase error
Notes: *1 Program all addresses to be erased
n
N?
Yes
*6
*2 Set the watchdog timer overflow
*3 For the erase-verify dummy write,
*4 Read the data to be verified with a
*5 The erase time x is successively
*6 t
by following the prewrite flowchart.
interval to the value indicated in
table 20.10.
write H'FF with a byte transfer
instruction.
byte transfer instruction. When
erasing two or more blocks, clear
the bits of erased blocks in the
erase block registers, so that only
unerased blocks will be erased
again.
incremented by the initial set value
erasing, the erase time is fixed. An
initial value of 6.25 ms or less
should be set, and the time for one
erasure should be 50 ms or less.
t
N:
VS
VS
2
1: 4 s or more
2: 2 s or more
n–1
602 (Set N so that total erase
(n = 1, 2, 3, 4). After fourth
No
Erase-verify ends
time does not exceed 30s.)
Double erase time
n + 1
(x
n
2 x)
4?
n
No
Yes
461

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