HD64F3437STF16V Renesas Electronics America, HD64F3437STF16V Datasheet - Page 410

MCU 3/5V 60K PB-FREE 100-TQFP

HD64F3437STF16V

Manufacturer Part Number
HD64F3437STF16V
Description
MCU 3/5V 60K PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300r
Datasheet

Specifications of HD64F3437STF16V

Core Processor
H8/300
Core Size
8-Bit
Speed
16MHz
Connectivity
Host Interface, I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F3437STF16V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD64F3437STF16V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
19.1.5
Flash memory is controlled by the pins listed in table 19.3.
Table 19.3 Flash Memory Pins
Pin Name
Programming power
Mode 1
Mode 0
Transmit data
Receive data
The transmit data and receive data pins are used in boot mode.
19.1.6
The flash memory is controlled by the registers listed in table 19.4.
Table 19.4 Flash Memory Registers
Name
Flash memory control register
Erase block register 1
Erase block register 2
Wait-state control register
Notes: *1 The wait-state control register controls the insertion of wait states by the wait-state
Registers FLMCR, EBR1, and EBR2 are only valid when writing to or erasing flash memory, and
can only be accessed while 12 V is being applied to the FV
When 12 V is not applied to the FV
address space, and in mode 3 these addresses cannot be modified and always read H'FF.
378
*2 In modes 2 and 3 (on-chip flash memory enabled), the initial value is H'00 for FLMCR
Input/Output Pins
Register Configuration
controller, frequency division of clock signals for the on-chip supporting modules by the
clock pulse generator, and emulation of flash-memory updates by RAM in on-board
programming mode.
and EBR2, and H'F0 for EBR1. In mode 1 (on-chip flash memory disabled), these
registers cannot be modified and always read H'FF.
Abbreviation
FV
MD
MD
TxD
RxD
*1
PP
1
0
1
1
Abbreviation
FLMCR
EBR1
EBR2
WSCR
PP
pin, in mode 2 addresses H'FF80 to H'FF83 are external
Input/Output
Power supply
Input
Input
Output
Input
R/W
R/W
R/W
R/W
R/W
PP
*2
*2
*2
Function
Apply 12.0 V
H8/3434F operating mode setting
H8/3434F operating mode setting
SCI1 transmit data output
SCI1 receive data input
pin.
Initial Value
H'00
H'F0
H'00
H'08
*2
*2
*2
Address
H'FF80
H'FF82
H'FF83
H'FFC2

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