HD64F3437STF16V Renesas Electronics America, HD64F3437STF16V Datasheet - Page 553

MCU 3/5V 60K PB-FREE 100-TQFP

HD64F3437STF16V

Manufacturer Part Number
HD64F3437STF16V
Description
MCU 3/5V 60K PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300r
Datasheet

Specifications of HD64F3437STF16V

Core Processor
H8/300
Core Size
8-Bit
Speed
16MHz
Connectivity
Host Interface, I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F3437STF16V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD64F3437STF16V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
21.4.2
Program-Verify Mode
In program-verify mode, the data written in program mode is read to check whether it has been
correctly written in the flash memory.
After the elapse of a given programming time, the programming mode is exited (the P bit in
FLMCR1 is cleared, then the PSU bit in FLMCR2 is cleared at least ( ) s later). The watchdog
timer is cleared after the elapse of ( ) s or more, and the operating mode is switched to program-
verify mode by setting the PV bit in FLMCR1. Before reading in program-verify mode, a dummy
write of H'FF data should be made to the addresses to be read. The dummy write should be
executed after the elapse of ( ) s or more. When the flash memory is read in this state (verify data
is read in 16-bit units), the data at the latched address is read. Wait at least ( ) s after the dummy
write before performing this read operation. Next, the originally written data is compared with the
verify data, and a bit generation operation is performed for reprogram data (see figure 21.12) and
transferred to the reprogram data area. After 32 bytes of data have been verified, exit program-
verify mode, wait for at least ( ) s, then clear the SWE bit in FLMCR1. If reprogramming is
necessary, set program mode again, and repeat the program/program-verify sequence as before.
However, ensure that the program/program-verify sequence is not repeated more than (N) times on
the same bits.
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