HD64F3437STF16V Renesas Electronics America, HD64F3437STF16V Datasheet - Page 178

MCU 3/5V 60K PB-FREE 100-TQFP

HD64F3437STF16V

Manufacturer Part Number
HD64F3437STF16V
Description
MCU 3/5V 60K PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300r
Datasheet

Specifications of HD64F3437STF16V

Core Processor
H8/300
Core Size
8-Bit
Speed
16MHz
Connectivity
Host Interface, I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F3437STF16V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD64F3437STF16V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
7.11
7.11.1
Port A is an 8-bit input/output port that is multiplexed with key-sense input pins. The port A pin
functions are the same in all operating modes. Figure 7.18 shows the pin configuration of port A.
Port A has built-in, programming MOS input pull-up transistors.
Pins in port A can drive one TTL load and a 90-pF capacitive load. They can also drive a
darlington transistor. Pins PA
section 13, I
7.11.2
Table 7.20 summarizes the port A registers.
Table 7.20 Port A Registers
Name
Port A data direction register
Port A output data register
Port A input data register
Note: The data direction register (PADDR) and input data register (PAPIN) have the same
146
address.
Port A
Overview
Register Configuration and Descriptions
2
C Bus Interface.
Port A
Figure 7.18 Port A Pin Configuration
4
, PA
Abbreviation
PADDR
PAODR
PAPIN
5
, PA
6
, and PA
Port A pins
PA
PA
PA
PA
PA
PA
PA
PA
7
6
5
4
3
2
1
0
(input/output)/KEYIN
(input/output)/KEYIN
(input/output)/KEYIN
(input/output)/KEYIN
(input/output)/KEYIN
(input/output)/KEYIN
(input/output)/KEYIN
(input/output)/KEYIN
7
can be driven as bus buffers, as shown in
Read/Write
W
R/W
R
Initial Value
H'00
H'00
Undetermined
15
14
13
12
11
10
9
8
(input)
(input)
(input)
(input)
(input)
(input)
(input)
(input)
Address
H'FFAB
H'FFAA
H'FFAB

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