HD64F3437STF16V Renesas Electronics America, HD64F3437STF16V Datasheet - Page 360

• Manufacturer Part Number: HD64F3437STF16V
• Description: MCU 3/5V 60K PB-FREE 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300r

Specifications of HD64F3437STF16V

• Core Processor: H8/300
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: Host Interface, I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

14.3
14.3.1
The host interface is activated by setting the HIE bit (bit 1) to 1 in SYSCR, establishing slave
mode. Activation of the host interface (entry to slave mode) appropriates the related I/O lines in
port 3 or B (data), port 8 or 9 (control) and port 4 (host interrupt requests) for interface use.
For host interface read/write timing diagrams, see section 23.3.8, Host Interface Timing.
14.3.2
Table 14.5 indicates the slave operations carried out in response to host interface signals from the
host processor.
Table 14.5 Host Interface Operation
CS
1
0
328
2
CS
0
1
Operation
Host Interface Operation
Control States
1
IOR
0
1
0
1
IOW
0
1
0
1
0
1
0
1
HA
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
Slave Operation
Prohibited
Prohibited
Data read from output data register 1 (ODR1)
Status read from status register 1 (STR1)
Data write to input data register 1 (IDR1)
Command write to input data register 1 (IDR1)
Idle state
Idle state
Prohibited
Prohibited
Data read from output data register 2 (ODR2)
Status read from status register 2 (STR2)
Data write to input data register 2 (IDR2)
Command write to input data register 2 (IDR2)
Idle state
Idle state