HD64F3437STF16V Renesas Electronics America, HD64F3437STF16V Datasheet - Page 270

MCU 3/5V 60K PB-FREE 100-TQFP

HD64F3437STF16V

Manufacturer Part Number
HD64F3437STF16V
Description
MCU 3/5V 60K PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300r
Datasheet

Specifications of HD64F3437STF16V

Core Processor
H8/300
Core Size
8-Bit
Speed
16MHz
Connectivity
Host Interface, I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F3437STF16V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD64F3437STF16V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
12.2.4
TDR is an 8-bit readable/writable register that holds the next data to be transmitted. When TSR
becomes empty, the data written in TDR is transferred to TSR. Continuous data transmission is
possible by writing the next data in TDR while the current data is being transmitted from TSR.
TDR is initialized to H'FF by a reset and in the standby modes.
12.2.5
SMR is an 8-bit readable/writable register that controls the communication format and selects the
clock source of the on-chip baud rate generator. It is initialized to H'00 by a reset and in the
standby modes. For further information on the SMR settings and communication formats, see
tables 12.7 and 12.9 in section 12.3, Operation.
Bit 7—Communication Mode (C/A): This bit selects asynchronous or synchronous
communication mode.
Bit 7: C/A
0
1
Bit 6—Character Length (CHR): This bit selects the character length in asynchronous mode.
It is ignored in synchronous mode.
Bit 6: CHR
0
1
238
Bit
Initial value
Read/Write
Bit
Initial value
Read/Write
Transmit Data Register (TDR)
Serial Mode Register (SMR)
R/W
R/W
C/A
Description
Asynchronous communication
Synchronous communication
Description
8 bits per character
7 bits per character (Bits 0 to 6 of TDR and RDR are used for transmitting and
receiving, respectively.)
7
1
7
0
CHR
R/W
R/W
6
1
6
0
R/W
R/W
PE
5
1
5
0
R/W
R/W
O/E
4
1
4
0
STOP
R/W
R/W
3
1
3
0
R/W
R/W
MP
2
1
2
0
CKS1
R/W
R/W
1
1
1
0
(Initial value)
(Initial value)
CKS0
R/W
R/W
0
1
0
0

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