HD64F3437STF16V Renesas Electronics America, HD64F3437STF16V Datasheet - Page 256

• Manufacturer Part Number: HD64F3437STF16V
• Description: MCU 3/5V 60K PB-FREE 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300r

Specifications of HD64F3437STF16V

• Core Processor: H8/300
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: Host Interface, I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

11.2.2
Note: * Software can write a 0 in bit 7 to clear the flag, but cannot write a 1 in this bit.
TCSR is an 8-bit readable/writable register that selects the timer mode and clock source and
performs other functions. (TCSR is write-protected by a password. See section 11.2.3, Register
Access, for details.)
Bits 7 to 5 and bit 3 are initialized to 0 by a reset and in the standby modes. Bits 2 to 0 are
initialized to 0 by a reset, but retain their values in the standby modes.
Bit 7—Overflow Flag (OVF): Indicates that the watchdog timer count has overflowed.
Bit 7: OVF
0
1
Bit 6—Timer Mode Select (WT/IT): Selects whether to operate in watchdog timer mode or
interval timer mode. When TCNT overflows, an WOVF interrupt request is sent to the CPU in
interval timer mode. For watchdog timer mode, a reset or NMI interrupt is requested.
Bit 6: WT/IT
0
1
Bit 5—Timer Enable (TME): Enables or disables the timer.
Bit 5: TME
0
1
224
Bit
Initial value
Read/Write
Timer Control/Status Register (TCSR)
R/(W)*
OVF
Description
To clear OVF, the CPU must read OVF after it has been set to 1, then write a 0
in this bit
Set to 1 when TCNT changes from H'FF to H'00
Description
Interval timer mode (WOVF request)
Watchdog timer mode (reset or NMI request)
Description
TCNT is initialized to H'00 and stopped
TCNT runs and requests a reset or an interrupt when it overflows
7
0
WT/IT
R/W
6
0
TME
R/W
5
0
—
—
4
1
RST/NMI
R/W
3
0
CKS2
R/W
2
0
CKS1
R/W
1
0
(Initial value)
(Initial value)
(Initial value)
CKS0
R/W
0
0