HD64F3437STF16V Renesas Electronics America, HD64F3437STF16V Datasheet - Page 429

MCU 3/5V 60K PB-FREE 100-TQFP

HD64F3437STF16V

Manufacturer Part Number
HD64F3437STF16V
Description
MCU 3/5V 60K PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300r
Datasheet

Specifications of HD64F3437STF16V

Core Processor
H8/300
Core Size
8-Bit
Speed
16MHz
Connectivity
Host Interface, I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F3437STF16V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD64F3437STF16V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Sample Program for Programming One Byte: This program uses the following registers.
R0H: Specifies blocks to be erased.
R1H: Stores data to be programmed.
R1L: Stores data to be read.
R3:
R4:
R5:
R6L: Used for program-verify fail count.
Arbitrary data can be programmed at an arbitrary address by setting the address in R3 and the data
in R1H.
The setting of #a and #b values depends on the clock frequency. Set #a and #b values according to
tables 19.9 (1) and (2).
FLMCR:
EBR1:
EBR2:
TCSR:
PRGM:
PRGMS:
LOOP1:
LOOP2:
Stores address to be programmed. Valid addresses are H'0000 to H'7FFF.
Sets program and program-verify timing loop counters, and also stores register setting
value.
Sets program timing loop counter.
.EQU
.EQU
.EQU
.EQU
.ALIGN
MOV.B
MOV.B
MOV.B
MOV.W
MOV.B
INC
MOV.W
MOV.W
MOV.W
BSET
SUBS
MOV.W
BNE
BCLR
MOV.W
MOV.W
MOV.B
BSET
DEC
BNE
MOV.B
CMP.B
BEQ
BCLR
H'FF80
H'FF82
H'FF83
H'FFA8
2
#H'**,
R0H,
#H'00,
#H'a,
R1H,
R6L
#H'A578, R4
R4,
R5,
#0,
#1,
R4,
LOOP1
#0,
#H'A500, R4
R4,
#H'b ,
#2,
R4H
LOOP2
@R3,
R1H,
PVOK
#2,
R0H
@EBR*:8
R6L
R5
@R3
@TCSR
R4
@FLMCR:8
R4
R4
@FLMCR:8
@TCSR
R4H
@FLMCR:8
R1L
R1L
@FLMCR:8
;
; Set EBR
; Program-verify fail counter
; Set program loop counter
; Dummy write
; Program-verify fail counter + 1
;
; Start watchdog timer
; Set program loop counter
;
;
; Wait loop
;
; Stop watchdog timer
; Set program-verify loop counter
;
; Wait loop
; Read programmed address
; Compare programmed data with read data
; Program-verify decision
;
;
;
;
Set P bit
Clear P bit
Set PV bit
Clear PV bit
*
R6L
397

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