HD64F3437STF16V Renesas Electronics America, HD64F3437STF16V Datasheet - Page 445
HD64F3437STF16V
Manufacturer Part Number
HD64F3437STF16V
Description
MCU 3/5V 60K PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300r
Datasheet
1.HD64F3437STF16V.pdf
(755 pages)
Specifications of HD64F3437STF16V
Core Processor
H8/300
Core Size
8-Bit
Speed
16MHz
Connectivity
Host Interface, I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD64F3437STF16V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD64F3437STF16V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
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Hardware Protection: Suspends or disables the programming and erasing of flash memory, and
resets the flash memory control register (FLMCR) and erase block registers (EBR1 and EBR2).
Details of hardware protection are as follows.
Protection
Programing
voltage (V
protect
Reset and
standby
protect
Interrupt
protect
Notes: *1 Three modes: program-verify, erase-verify, and prewrite-verify.
19.4.9
If an interrupt occurs
FLMCR is set), the following operating states can occur.
If an interrupt is generated during programming or erasing, programming or erasing is aborted
to protect the flash memory. Since memory cell values after a forced interrupt are
indeterminate, the system will not operate correctly after such an interrupt.
Program runaway may result because the vector table could not be read correctly in interrupt
exception handling during programming or erasure
*2 All blocks are erase-disabled. It is not possible to specify individual blocks.
*3 For details, see section 19.7, Flash Memory Programming and Erasing Precautions.
Interrupt Handling during Flash Memory Programming and Erasing
PP
)
Description
When 12 V is not applied to the FV
FLMCR, EBR1, and EBR2 are initialized,
disabling programming and erasing. To obtain
this protection, V
When a reset occurs (including a watchdog
timer reset) or standby mode is entered,
FLMCR, EBR1, and EBR2 are initialized,
disabling programming and erasing. Note that
RES input does not ensure a reset unless the
RES pin is held low for at least 20 ms at power-
up (to enable the oscillator to settle), or at least
ten system clock cycles (10ø) during operation.
To prevent damage to the flash memory, if
interrupt input occurs while flash memory is
being programmed or erased, programming or
erasing is aborted immediately. The settings in
FLMCR, EBR1, and EBR2 are retained. This
type of protection can be cleared only by a
reset.
*1
while flash memory is being programmed or erased (while the P or E bit of
PP
should not exceed V
PP
pin,
CC
*2
.
.
*3
Program
Disabled
Disabled
Disabled
Function
Erase
Disabled
Disabled
Disabled
*2
*2
*2
Verify
Disabled
Disabled
Enabled
*1
413
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