HD64F3437STF16V Renesas Electronics America, HD64F3437STF16V Datasheet - Page 580

MCU 3/5V 60K PB-FREE 100-TQFP

HD64F3437STF16V

Manufacturer Part Number
HD64F3437STF16V
Description
MCU 3/5V 60K PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300r
Datasheet

Specifications of HD64F3437STF16V

Core Processor
H8/300
Core Size
8-Bit
Speed
16MHz
Connectivity
Host Interface, I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F3437STF16V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD64F3437STF16V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
22.3.3
Set bits STS2 to STS0 in SYSCR as follows:
Table 22.3 Times Set by Standby Timer Select Bits (Unit: ms)
STS2
0
0
0
0
1
Notes: 1. All times are in milliseconds.
548
Crystal oscillator
Set STS2 to STS0 for a settling time of at least 8 ms. Table 22.3 lists the settling times selected
by these bits at several clock frequencies.
External clock
The STS bits can be set to any value. When 1,024 states (STS2 to STS0 = 101) is selected, the
following points should be noted.
If a period exceeding øp/1,024 (e.g. øp/2,048) is specified when selecting the 8-bit timer,
PWM timer, or watchdog timer clock, the counter in the timer will not count up normally when
1,024 states is specified for the settling time. To avoid this problem, set the STS value just
before the transition to software standby mode (before executing the SLEEP instruction), and
re-set the value of STS2 to STS0 to a value from 000 to 100 directly after software standby
mode is cleared by an interrupt.
2. Recommended values are printed in boldface.
*
STS1
0
0
1
1
0
Clock Settling Time for Exit from Software Standby Mode
F-ZTAT version/ZTAT and mask-ROM versions
STS0
0
1
0
1
0/—*
Settling
Time
(States)
8,192
16,384
32,768
65,536
131,072
16
0.51
1.0
2.0
4.1
8.2
12
0.65
1.3
2.7
5.5
10.9
10
0.8
1.6
3.3
6.6
13.1
System Clock Frequency (MHz)
8
1.0
2.0
4.1
8.2
16.4
6
1.3
2.7
5.5
10.9
21.8
4
4.1
8.2
16.4
32.8
2.0
2
4.1
8.2
16.4
32.8
65.5
1
8.2
16.4
32.8
65.5
131.1 262.1
0.5
16.4
32.8
65.5
131.1

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